sched,nr: ensure the SSB and NZP CSI RS allocations are cleared at the end of every slot

srsenb/src/stack/mac/nr/sched_nr_grant_allocator.cc

@@ -47,6 +47,8 @@ void bwp_slot_grid::reset()
   puschs.clear();
   pending_acks.clear();
   pucch.clear();
+  ssb.clear();
+  nzp_csi_rs.clear();
 }
 
 bwp_res_grid::bwp_res_grid(const bwp_params& bwp_cfg_) : cfg(&bwp_cfg_)

srsenb/src/stack/mac/nr/sched_nr_worker.cc

@@ -343,12 +343,14 @@ bool sched_worker_manager::save_sched_result(slot_point      pdcch_slot,
   // NOTE: Unlocked region
   auto& bwp_slot = cells[cc]->bwps[0].grid[pdcch_slot];
 
-  dl_res.dl_sched.pdcch_dl = bwp_slot.dl_pdcchs;
-  dl_res.dl_sched.pdcch_ul = bwp_slot.ul_pdcchs;
-  dl_res.dl_sched.pdsch    = bwp_slot.pdschs;
-  dl_res.rar               = bwp_slot.rar;
-  ul_res.pusch             = bwp_slot.puschs;
-  ul_res.pucch             = bwp_slot.pucch;
+  dl_res.dl_sched.pdcch_dl   = bwp_slot.dl_pdcchs;
+  dl_res.dl_sched.pdcch_ul   = bwp_slot.ul_pdcchs;
+  dl_res.dl_sched.pdsch      = bwp_slot.pdschs;
+  dl_res.rar                 = bwp_slot.rar;
+  dl_res.dl_sched.ssb        = bwp_slot.ssb;
+  dl_res.dl_sched.nzp_csi_rs = bwp_slot.nzp_csi_rs;
+  ul_res.pusch               = bwp_slot.puschs;
+  ul_res.pucch               = bwp_slot.pucch;
 
   // clear up BWP slot
   bwp_slot.reset();