diff --git a/srsenb/hdr/stack/mac/nr/mac_nr.h b/srsenb/hdr/stack/mac/nr/mac_nr.h index f0687f27e..3b44d5bba 100644 --- a/srsenb/hdr/stack/mac/nr/mac_nr.h +++ b/srsenb/hdr/stack/mac/nr/mac_nr.h @@ -28,11 +28,11 @@ namespace srsenb { struct mac_nr_args_t { - srsran::phy_cfg_nr_t phy_base_cfg = {}; - int fixed_dl_mcs = -1; - int fixed_ul_mcs = -1; - sched_nr_interface::sched_cfg_t sched_cfg = {}; - srsenb::pcap_args_t pcap; + srsran::phy_cfg_nr_t phy_base_cfg = {}; + int fixed_dl_mcs = -1; + int fixed_ul_mcs = -1; + sched_nr_interface::sched_args_t sched_cfg = {}; + srsenb::pcap_args_t pcap; }; class mac_nr final : public mac_interface_phy_nr, public mac_interface_rrc_nr, public mac_interface_rlc_nr @@ -87,7 +87,7 @@ private: void get_metrics_nolock(srsenb::mac_metrics_t& metrics); // Encoding - srsran::byte_buffer_t* assemble_rar(srsran::const_span grants); + srsran::byte_buffer_t* assemble_rar(srsran::const_span grants); srsran::unique_byte_buffer_t rar_pdu_buffer = nullptr; // Interaction with other components diff --git a/srsenb/hdr/stack/mac/nr/sched_nr.h b/srsenb/hdr/stack/mac/nr/sched_nr.h index 7ec69419e..5e3e79de7 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr.h @@ -30,7 +30,6 @@ class sched_worker_manager; class serv_cell_manager; } // namespace sched_nr_impl -class ue_event_manager; class ul_sched_result_buffer; class sched_nr final : public sched_nr_interface @@ -38,12 +37,12 @@ class sched_nr final : public sched_nr_interface public: explicit sched_nr(); ~sched_nr() override; - int config(const sched_cfg_t& sched_cfg, srsran::const_span cell_list) override; + int config(const sched_args_t& sched_cfg, srsran::const_span cell_list) override; void ue_cfg(uint16_t rnti, const ue_cfg_t& cfg) override; void ue_rem(uint16_t rnti) override; bool ue_exists(uint16_t rnti) override; - int dl_rach_info(uint32_t cc, const dl_sched_rar_info_t& rar_info); + int dl_rach_info(uint32_t cc, const rar_info_t& rar_info); void dl_ack_info(uint16_t rnti, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) override; void ul_crc_info(uint16_t rnti, uint32_t cc, uint32_t pid, bool crc) override; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_cell.h b/srsenb/hdr/stack/mac/nr/sched_nr_cell.h index d07a00253..540726b67 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_cell.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_cell.h @@ -25,12 +25,12 @@ namespace sched_nr_impl { class si_sched { public: - explicit si_sched(const bwp_params& bwp_cfg_); + explicit si_sched(const bwp_params_t& bwp_cfg_); void run_slot(bwp_slot_allocator& slot_alloc); private: - const bwp_params* bwp_cfg = nullptr; + const bwp_params_t* bwp_cfg = nullptr; srslog::basic_logger& logger; struct sched_si_t { @@ -45,13 +45,13 @@ private: srsran::bounded_vector pending_sis; }; -using dl_sched_rar_info_t = sched_nr_interface::dl_sched_rar_info_t; +using dl_sched_rar_info_t = sched_nr_interface::rar_info_t; /// RAR/Msg3 scheduler class ra_sched { public: - explicit ra_sched(const bwp_params& bwp_cfg_); + explicit ra_sched(const bwp_params_t& bwp_cfg_); /// Addition of detected PRACH into the queue int dl_rach_info(const dl_sched_rar_info_t& rar_info); @@ -73,7 +73,7 @@ private: alloc_result allocate_pending_rar(bwp_slot_allocator& slot_grid, const pending_rar_t& rar, uint32_t& nof_grants_alloc); - const bwp_params* bwp_cfg = nullptr; + const bwp_params_t* bwp_cfg = nullptr; srslog::basic_logger& logger; srsran::deque pending_rars; @@ -82,9 +82,9 @@ private: class bwp_ctxt { public: - explicit bwp_ctxt(const bwp_params& bwp_cfg); + explicit bwp_ctxt(const bwp_params_t& bwp_cfg); - const bwp_params* cfg; + const bwp_params_t* cfg; // channel-specific schedulers ra_sched ra; @@ -99,10 +99,10 @@ class serv_cell_manager public: using feedback_callback_t = srsran::move_callback; - explicit serv_cell_manager(const sched_cell_params& cell_cfg_); + explicit serv_cell_manager(const cell_params_t& cell_cfg_); srsran::bounded_vector bwps; - const sched_cell_params& cfg; + const cell_params_t& cfg; private: srslog::basic_logger& logger; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h b/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h index 26c225805..a2a7f38ef 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h @@ -26,27 +26,32 @@ static const size_t MAX_NOF_AGGR_LEVELS = 5; namespace sched_nr_impl { -const static size_t MAX_GRANTS = sched_nr_interface::MAX_GRANTS; - -using pdcch_dl_t = mac_interface_phy_nr::pdcch_dl_t; -using pdcch_ul_t = mac_interface_phy_nr::pdcch_ul_t; -using pdsch_t = mac_interface_phy_nr::pdsch_t; -using pusch_t = mac_interface_phy_nr::pusch_t; -using pucch_t = mac_interface_phy_nr::pucch_t; -using pdcch_dl_list_t = srsran::bounded_vector; -using pdcch_ul_list_t = srsran::bounded_vector; -using pucch_list_t = srsran::bounded_vector; -using pusch_list_t = srsran::bounded_vector; -using nzp_csi_rs_list = srsran::bounded_vector; -using ssb_t = mac_interface_phy_nr::ssb_t; -using ssb_list = srsran::bounded_vector; - -using sched_cfg_t = sched_nr_interface::sched_cfg_t; -using cell_cfg_t = sched_nr_interface::cell_cfg_t; -using bwp_cfg_t = sched_nr_interface::bwp_cfg_t; - +constexpr static size_t MAX_GRANTS = sched_nr_interface::MAX_GRANTS; + +using pdcch_dl_t = mac_interface_phy_nr::pdcch_dl_t; +using pdcch_ul_t = mac_interface_phy_nr::pdcch_ul_t; +using pdsch_t = mac_interface_phy_nr::pdsch_t; +using pusch_t = mac_interface_phy_nr::pusch_t; +using pucch_t = mac_interface_phy_nr::pucch_t; +using pdcch_dl_list_t = srsran::bounded_vector; +using pdcch_ul_list_t = srsran::bounded_vector; +using pucch_list_t = srsran::bounded_vector; +using pusch_list_t = srsran::bounded_vector; +using nzp_csi_rs_list = srsran::bounded_vector; +using ssb_t = mac_interface_phy_nr::ssb_t; +using ssb_list = srsran::bounded_vector; +using sched_args_t = sched_nr_interface::sched_args_t; +using cell_cfg_t = sched_nr_interface::cell_cfg_t; +using bwp_cfg_t = sched_nr_interface::bwp_cfg_t; +using ue_cfg_t = sched_nr_interface::ue_cfg_t; +using ue_cc_cfg_t = sched_nr_interface::ue_cc_cfg_t; using pdcch_cce_pos_list = srsran::bounded_vector; using bwp_cce_pos_list = std::array, SRSRAN_NOF_SF_X_FRAME>; +using dl_sched_t = sched_nr_interface::dl_sched_t; +using ul_sched_t = sched_nr_interface::ul_sched_t; +using dl_sched_res_t = sched_nr_interface::dl_sched_res_t; + +/// Generate list of CCE locations for UE based on coreset and search space configurations void get_dci_locs(const srsran_coreset_t& coreset, const srsran_search_space_t& search_space, uint16_t rnti, @@ -54,18 +59,22 @@ void get_dci_locs(const srsran_coreset_t& coreset, /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -struct bwp_params { - const uint32_t bwp_id; - const uint32_t cc; - const bwp_cfg_t& cfg; - const cell_cfg_t& cell_cfg; - const sched_cfg_t& sched_cfg; +/// Structure that extends the sched_nr_interface::bwp_cfg_t passed by upper layers with other +/// derived BWP-specific params +struct bwp_params_t { + const uint32_t bwp_id; + const uint32_t cc; + const bwp_cfg_t& cfg; + const cell_cfg_t& cell_cfg; + const sched_args_t& sched_cfg; // derived params srslog::basic_logger& logger; uint32_t P; uint32_t N_rbg; + uint32_t nof_prb() const { return cell_cfg.carrier.nof_prb; } + /// Table specifying if a slot has DL or UL enabled struct slot_cfg { bool is_dl; bool is_ul; @@ -82,48 +91,42 @@ struct bwp_params { bwp_cce_pos_list rar_cce_list; - bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, uint32_t cc, uint32_t bwp_id); + bwp_params_t(const cell_cfg_t& cell, const sched_args_t& sched_cfg_, uint32_t cc, uint32_t bwp_id); }; -struct sched_cell_params { - const uint32_t cc; - const cell_cfg_t cell_cfg; - const sched_cfg_t& sched_cfg; - std::vector bwps; +/// Structure packing a single cell config params, and sched args +struct cell_params_t { + const uint32_t cc; + const cell_cfg_t cfg; + const sched_args_t& sched_args; + std::vector bwps; - sched_cell_params(uint32_t cc_, const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_); + cell_params_t(uint32_t cc_, const cell_cfg_t& cell, const sched_args_t& sched_cfg_); - uint32_t nof_prb() const { return cell_cfg.carrier.nof_prb; } + uint32_t nof_prb() const { return cfg.carrier.nof_prb; } }; +/// Structure packing both the sched args and all gNB NR cell configurations struct sched_params { - sched_cfg_t sched_cfg; - std::vector cells; + sched_args_t sched_cfg; + std::vector cells; sched_params() = default; - explicit sched_params(const sched_cfg_t& sched_cfg_); + explicit sched_params(const sched_args_t& sched_cfg_); }; /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -using prb_bitmap = srsran::bounded_bitset; - -using pdcchmask_t = srsran::bounded_bitset; - -/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - -using ue_cfg_t = sched_nr_interface::ue_cfg_t; -using ue_cc_cfg_t = sched_nr_interface::ue_cc_cfg_t; - +/// Configuration of a UE for a given BWP class bwp_ue_cfg { public: bwp_ue_cfg() = default; - explicit bwp_ue_cfg(uint16_t rnti, const bwp_params& bwp_cfg, const ue_cfg_t& uecfg_); + explicit bwp_ue_cfg(uint16_t rnti, const bwp_params_t& bwp_cfg, const ue_cfg_t& uecfg_); const ue_cfg_t* ue_cfg() const { return cfg_; } const srsran::phy_cfg_nr_t& phy() const { return cfg_->phy_cfg; } - const bwp_params& active_bwp() const { return *bwp_cfg; } + const bwp_params_t& active_bwp() const { return *bwp_cfg; } const bwp_cce_pos_list& cce_pos_list(uint32_t search_id) const { return cce_positions_list[ss_id_to_cce_idx[search_id]]; @@ -137,9 +140,9 @@ public: } private: - uint16_t rnti = SRSRAN_INVALID_RNTI; - const ue_cfg_t* cfg_ = nullptr; - const bwp_params* bwp_cfg = nullptr; + uint16_t rnti = SRSRAN_INVALID_RNTI; + const ue_cfg_t* cfg_ = nullptr; + const bwp_params_t* bwp_cfg = nullptr; std::vector cce_positions_list; std::array ss_id_to_cce_idx; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_grant_allocator.h b/srsenb/hdr/stack/mac/nr/sched_nr_grant_allocator.h index 8b141ed73..bb7ad0235 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_grant_allocator.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_grant_allocator.h @@ -24,7 +24,7 @@ namespace srsenb { namespace sched_nr_impl { // typedefs -using dl_sched_rar_info_t = sched_nr_interface::dl_sched_rar_info_t; +using dl_sched_rar_info_t = sched_nr_interface::rar_info_t; /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// @@ -44,8 +44,8 @@ using harq_ack_list_t = srsran::bounded_vector; /// save data for scheduler to keep track of previous allocations /// This only contains information about a given slot struct bwp_slot_grid { - uint32_t slot_idx = 0; - const bwp_params* cfg = nullptr; + uint32_t slot_idx = 0; + const bwp_params_t* cfg = nullptr; bwp_rb_bitmap dl_prbs; bwp_rb_bitmap ul_prbs; @@ -63,7 +63,7 @@ struct bwp_slot_grid { srsran::unique_pool_ptr rar_softbuffer; bwp_slot_grid() = default; - explicit bwp_slot_grid(const bwp_params& bwp_params, uint32_t slot_idx_); + explicit bwp_slot_grid(const bwp_params_t& bwp_params, uint32_t slot_idx_); void reset(); bool is_dl() const { return cfg->slots[slot_idx].is_dl; } @@ -71,14 +71,14 @@ struct bwp_slot_grid { }; struct bwp_res_grid { - explicit bwp_res_grid(const bwp_params& bwp_cfg_); + explicit bwp_res_grid(const bwp_params_t& bwp_cfg_); bwp_slot_grid& operator[](slot_point tti) { return slots[tti.to_uint() % slots.capacity()]; }; const bwp_slot_grid& operator[](slot_point tti) const { return slots[tti.to_uint() % slots.capacity()]; }; uint32_t id() const { return cfg->bwp_id; } uint32_t nof_prbs() const { return cfg->cfg.rb_width; } - const bwp_params* cfg = nullptr; + const bwp_params_t* cfg = nullptr; private: // TTIMOD_SZ is the longest allocation in the future @@ -114,7 +114,7 @@ public: slot_point get_tti_rx() const { return pdcch_slot - TX_ENB_DELAY; } const bwp_res_grid& res_grid() const { return bwp_grid; } - const bwp_params& cfg; + const bwp_params_t& cfg; private: alloc_result verify_pdsch_space(bwp_slot_grid& pdsch_grid, bwp_slot_grid& pdcch_grid) const; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h b/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h index ab450d04a..81265827c 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h @@ -25,20 +25,20 @@ struct bwp_res_grid; /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -bool fill_dci_rar(prb_interval interv, uint16_t ra_rnti, const bwp_params& bwp_cfg, srsran_dci_dl_nr_t& dci); +bool fill_dci_rar(prb_interval interv, uint16_t ra_rnti, const bwp_params_t& bwp_cfg, srsran_dci_dl_nr_t& dci); -bool fill_dci_msg3(const slot_ue& ue, const bwp_params& bwp_cfg, srsran_dci_ul_nr_t& dci); +bool fill_dci_msg3(const slot_ue& ue, const bwp_params_t& bwp_cfg, srsran_dci_ul_nr_t& dci); /// Generate PDCCH DL DCI fields void fill_dl_dci_ue_fields(const slot_ue& ue, - const bwp_params& bwp_cfg, + const bwp_params_t& bwp_cfg, uint32_t ss_id, srsran_dci_location_t dci_pos, srsran_dci_dl_nr_t& dci); /// Generate PDCCH UL DCI fields void fill_ul_dci_ue_fields(const slot_ue& ue, - const bwp_params& bwp_cfg, + const bwp_params_t& bwp_cfg, uint32_t ss_id, srsran_dci_location_t dci_pos, srsran_dci_ul_nr_t& dci); diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_interface.h b/srsenb/hdr/stack/mac/nr/sched_nr_interface.h index 19943040b..6a075e834 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_interface.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_interface.h @@ -67,7 +67,7 @@ public: srsran::bounded_vector bwps{1}; // idx0 for BWP-common }; - struct sched_cfg_t { + struct sched_args_t { bool pdsch_enabled = true; bool pusch_enabled = true; bool auto_refill_buffer = false; @@ -88,9 +88,9 @@ public: srsran::phy_cfg_nr_t phy_cfg = {}; }; - ////// RACH ////// + ////// RA procedure ////// - struct dl_sched_rar_info_t { + struct rar_info_t { uint32_t preamble_idx; // is this the RAPID? uint32_t ofdm_symbol_idx; uint32_t freq_idx; @@ -99,32 +99,32 @@ public: uint32_t msg3_size = 7; slot_point prach_slot; }; + struct msg3_grant_t { + rar_info_t data; + srsran_dci_ul_nr_t msg3_dci = {}; + }; + struct rar_t { + srsran::bounded_vector grants; + }; ///// Sched Result ///// using dl_sched_t = mac_interface_phy_nr::dl_sched_t; using ul_sched_t = mac_interface_phy_nr::ul_sched_t; - struct sched_rar_grant_t { - dl_sched_rar_info_t data; - srsran_dci_ul_nr_t msg3_dci = {}; - }; - struct sched_rar_t { - srsran::bounded_vector grants; - }; - using sched_rar_list_t = srsran::bounded_vector; + using sched_rar_list_t = srsran::bounded_vector; struct dl_sched_res_t { sched_rar_list_t rar; dl_sched_t dl_sched; }; virtual ~sched_nr_interface() = default; - virtual int config(const sched_cfg_t& sched_cfg, srsran::const_span ue_cfg) = 0; - virtual void ue_cfg(uint16_t rnti, const ue_cfg_t& ue_cfg) = 0; - virtual void ue_rem(uint16_t rnti) = 0; - virtual bool ue_exists(uint16_t rnti) = 0; - virtual int run_slot(slot_point slot_rx, uint32_t cc, dl_sched_res_t& result) = 0; - virtual int get_ul_sched(slot_point slot_rx, uint32_t cc, ul_sched_t& result) = 0; + virtual int config(const sched_args_t& sched_cfg, srsran::const_span ue_cfg) = 0; + virtual void ue_cfg(uint16_t rnti, const ue_cfg_t& ue_cfg) = 0; + virtual void ue_rem(uint16_t rnti) = 0; + virtual bool ue_exists(uint16_t rnti) = 0; + virtual int run_slot(slot_point slot_rx, uint32_t cc, dl_sched_res_t& result) = 0; + virtual int get_ul_sched(slot_point slot_rx, uint32_t cc, ul_sched_t& result) = 0; virtual void dl_ack_info(uint16_t rnti, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) = 0; virtual void ul_crc_info(uint16_t rnti, uint32_t cc, uint32_t pid, bool crc) = 0; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h b/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h index d2dad1b36..c151a8465 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h @@ -34,11 +34,11 @@ using bwp_cfg_t = sched_nr_interface::bwp_cfg_t; class coreset_region { public: - coreset_region(const bwp_params& bwp_cfg_, - uint32_t coreset_id_, - uint32_t slot_idx, - pdcch_dl_list_t& pdcch_dl_list, - pdcch_ul_list_t& pdcch_ul_list); + coreset_region(const bwp_params_t& bwp_cfg_, + uint32_t coreset_id_, + uint32_t slot_idx, + pdcch_dl_list_t& pdcch_dl_list, + pdcch_ul_list_t& pdcch_ul_list); void reset(); /** diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_signalling.h b/srsenb/hdr/stack/mac/nr/sched_nr_signalling.h index f5d03baa4..d3188469a 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_signalling.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_signalling.h @@ -42,10 +42,10 @@ void sched_nzp_csi_rs(srsran::const_span nzp_csi_rs_set void sched_ssb_basic(const slot_point& sl_point, uint32_t ssb_periodicity, ssb_list& ssb_list); /// For a given BWP and slot, schedule SSB, NZP CSI RS and SIBs -void sched_dl_signalling(const bwp_params& bwp_params, - slot_point sl_pdcch, - ssb_list& ssb_list, - nzp_csi_rs_list& nzp_csi_rs); +void sched_dl_signalling(const bwp_params_t& bwp_params, + slot_point sl_pdcch, + ssb_list& ssb_list, + nzp_csi_rs_list& nzp_csi_rs); } // namespace sched_nr_impl } // namespace srsenb diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_ue.h b/srsenb/hdr/stack/mac/nr/sched_nr_ue.h index b02d14db0..4104e786b 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_ue.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_ue.h @@ -62,7 +62,7 @@ public: class ue_carrier { public: - ue_carrier(uint16_t rnti, const ue_cfg_t& cfg, const sched_cell_params& cell_params_); + ue_carrier(uint16_t rnti, const ue_cfg_t& cfg, const cell_params_t& cell_params_); slot_ue try_reserve(slot_point pdcch_slot, const ue_cfg_t& uecfg_, uint32_t dl_harq_bytes, uint32_t ul_harq_bytes); const uint16_t rnti; @@ -78,8 +78,8 @@ public: mac_ue_metrics_t metrics = {}; private: - bwp_ue_cfg bwp_cfg; - const sched_cell_params& cell_params; + bwp_ue_cfg bwp_cfg; + const cell_params_t& cell_params; }; class ue diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_worker.h b/srsenb/hdr/stack/mac/nr/sched_nr_worker.h index 7154414db..f9843ca3c 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_worker.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_worker.h @@ -30,10 +30,6 @@ struct mac_metrics_t; namespace sched_nr_impl { -using dl_sched_t = sched_nr_interface::dl_sched_t; -using ul_sched_t = sched_nr_interface::ul_sched_t; -using dl_sched_res_t = sched_nr_interface::dl_sched_res_t; - class slot_cc_worker { public: @@ -57,9 +53,9 @@ private: void alloc_ul_ues(); void postprocess_decisions(); - const sched_cell_params& cfg; - serv_cell_manager& cell; - srslog::basic_logger& logger; + const cell_params_t& cfg; + serv_cell_manager& cell; + srslog::basic_logger& logger; slot_point slot_rx; bwp_slot_allocator bwp_alloc; diff --git a/srsenb/src/stack/mac/nr/mac_nr.cc b/srsenb/src/stack/mac/nr/mac_nr.cc index b0a82fa8d..150b0e2d0 100644 --- a/srsenb/src/stack/mac/nr/mac_nr.cc +++ b/srsenb/src/stack/mac/nr/mac_nr.cc @@ -165,11 +165,11 @@ void mac_nr::rach_detected(const rach_info_t& rach_info) ++detected_rachs[enb_cc_idx]; // Trigger scheduler RACH - srsenb::sched_nr_interface::dl_sched_rar_info_t rar_info = {}; - rar_info.preamble_idx = rach_info.preamble; - rar_info.temp_crnti = rnti; - rar_info.ta_cmd = rach_info.time_adv; - rar_info.prach_slot = slot_point{NUMEROLOGY_IDX, rach_info.slot_index}; + srsenb::sched_nr_interface::rar_info_t rar_info = {}; + rar_info.preamble_idx = rach_info.preamble; + rar_info.temp_crnti = rnti; + rar_info.ta_cmd = rach_info.time_adv; + rar_info.prach_slot = slot_point{NUMEROLOGY_IDX, rach_info.slot_index}; // TODO: fill remaining fields as required sched.dl_rach_info(enb_cc_idx, rar_info); rrc->add_user(rnti); @@ -312,7 +312,7 @@ int mac_nr::get_dl_sched(const srsran_slot_cfg_t& slot_cfg, dl_sched_t& dl_sched } } } else if (pdsch.sch.grant.rnti_type == srsran_rnti_type_ra) { - sched_nr_interface::sched_rar_t& rar = dl_res.rar[rar_count++]; + sched_nr_interface::rar_t& rar = dl_res.rar[rar_count++]; // for RARs we could actually move the byte_buffer to the PHY, as there are no retx pdsch.data[0] = assemble_rar(rar.grants); } @@ -372,6 +372,7 @@ int mac_nr::pusch_info(const srsran_slot_cfg_t& slot_cfg, mac_interface_phy_nr:: { uint16_t rnti = pusch_info.rnti; uint32_t nof_bytes = pusch_info.pdu->N_bytes; + // Handle UCI data if (not handle_uci_data(rnti, pusch_info.uci_cfg, pusch_info.pusch_data.uci)) { logger.error("Error handling UCI data from PUCCH reception"); @@ -405,7 +406,7 @@ int mac_nr::pusch_info(const srsran_slot_cfg_t& slot_cfg, mac_interface_phy_nr:: return SRSRAN_SUCCESS; } -srsran::byte_buffer_t* mac_nr::assemble_rar(srsran::const_span grants) +srsran::byte_buffer_t* mac_nr::assemble_rar(srsran::const_span grants) { srsran::mac_rar_pdu_nr rar_pdu; diff --git a/srsenb/src/stack/mac/nr/sched_nr.cc b/srsenb/src/stack/mac/nr/sched_nr.cc index 28e88bba6..85d25c5cd 100644 --- a/srsenb/src/stack/mac/nr/sched_nr.cc +++ b/srsenb/src/stack/mac/nr/sched_nr.cc @@ -70,7 +70,7 @@ sched_nr::sched_nr() : logger(&srslog::fetch_basic_logger("MAC-NR")) {} sched_nr::~sched_nr() {} -int sched_nr::config(const sched_cfg_t& sched_cfg, srsran::const_span cell_list) +int sched_nr::config(const sched_args_t& sched_cfg, srsran::const_span cell_list) { cfg = sched_params{sched_cfg}; logger = &srslog::fetch_basic_logger(sched_cfg.logger_name); @@ -153,7 +153,7 @@ void sched_nr::get_metrics(mac_metrics_t& metrics) sched_workers->get_metrics(metrics); } -int sched_nr::dl_rach_info(uint32_t cc, const dl_sched_rar_info_t& rar_info) +int sched_nr::dl_rach_info(uint32_t cc, const rar_info_t& rar_info) { sched_workers->enqueue_cc_event(cc, [this, cc, rar_info]() { cells[cc]->bwps[0].ra.dl_rach_info(rar_info); }); return SRSRAN_SUCCESS; diff --git a/srsenb/src/stack/mac/nr/sched_nr_cell.cc b/srsenb/src/stack/mac/nr/sched_nr_cell.cc index 909263669..0881d2144 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_cell.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_cell.cc @@ -17,7 +17,7 @@ namespace srsenb { namespace sched_nr_impl { -si_sched::si_sched(const bwp_params& bwp_cfg_) : +si_sched::si_sched(const bwp_params_t& bwp_cfg_) : bwp_cfg(&bwp_cfg_), logger(srslog::fetch_basic_logger(bwp_cfg_.sched_cfg.logger_name)) {} @@ -77,7 +77,7 @@ void si_sched::run_slot(bwp_slot_allocator& slot_alloc) /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -ra_sched::ra_sched(const bwp_params& bwp_cfg_) : +ra_sched::ra_sched(const bwp_params_t& bwp_cfg_) : bwp_cfg(&bwp_cfg_), logger(srslog::fetch_basic_logger(bwp_cfg_.sched_cfg.logger_name)) {} @@ -220,16 +220,16 @@ int ra_sched::dl_rach_info(const dl_sched_rar_info_t& rar_info) return SRSRAN_SUCCESS; } -bwp_ctxt::bwp_ctxt(const bwp_params& bwp_cfg) : +bwp_ctxt::bwp_ctxt(const bwp_params_t& bwp_cfg) : cfg(&bwp_cfg), ra(bwp_cfg), grid(bwp_cfg), data_sched(new sched_nr_time_rr()) {} ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -serv_cell_manager::serv_cell_manager(const sched_cell_params& cell_cfg_) : - cfg(cell_cfg_), logger(srslog::fetch_basic_logger(cell_cfg_.sched_cfg.logger_name)) +serv_cell_manager::serv_cell_manager(const cell_params_t& cell_cfg_) : + cfg(cell_cfg_), logger(srslog::fetch_basic_logger(cell_cfg_.sched_args.logger_name)) { - for (uint32_t bwp_id = 0; bwp_id < cfg.cell_cfg.bwps.size(); ++bwp_id) { + for (uint32_t bwp_id = 0; bwp_id < cfg.cfg.bwps.size(); ++bwp_id) { bwps.emplace_back(cell_cfg_.bwps[bwp_id]); } diff --git a/srsenb/src/stack/mac/nr/sched_nr_cfg.cc b/srsenb/src/stack/mac/nr/sched_nr_cfg.cc index 04f7ecaa6..f077d8edd 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_cfg.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_cfg.cc @@ -20,7 +20,25 @@ extern "C" { namespace srsenb { namespace sched_nr_impl { -bwp_params::bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, uint32_t cc_, uint32_t bwp_id_) : +void get_dci_locs(const srsran_coreset_t& coreset, + const srsran_search_space_t& search_space, + uint16_t rnti, + bwp_cce_pos_list& cce_locs) +{ + for (uint32_t sl = 0; sl < SRSRAN_NOF_SF_X_FRAME; ++sl) { + for (uint32_t agg_idx = 0; agg_idx < MAX_NOF_AGGR_LEVELS; ++agg_idx) { + pdcch_cce_pos_list pdcch_locs; + cce_locs[sl][agg_idx].resize(pdcch_locs.capacity()); + uint32_t n = + srsran_pdcch_nr_locations_coreset(&coreset, &search_space, rnti, agg_idx, sl, cce_locs[sl][agg_idx].data()); + cce_locs[sl][agg_idx].resize(n); + } + } +} + +/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +bwp_params_t::bwp_params_t(const cell_cfg_t& cell, const sched_args_t& sched_cfg_, uint32_t cc_, uint32_t bwp_id_) : cell_cfg(cell), sched_cfg(sched_cfg_), cc(cc_), @@ -73,39 +91,21 @@ bwp_params::bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, ui } } -sched_cell_params::sched_cell_params(uint32_t cc_, const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_) : - cc(cc_), cell_cfg(cell), sched_cfg(sched_cfg_) +cell_params_t::cell_params_t(uint32_t cc_, const cell_cfg_t& cell, const sched_args_t& sched_cfg_) : + cc(cc_), cfg(cell), sched_args(sched_cfg_) { bwps.reserve(cell.bwps.size()); - for (uint32_t i = 0; i < cell_cfg.bwps.size(); ++i) { - bwps.emplace_back(cell_cfg, sched_cfg_, cc, i); + for (uint32_t i = 0; i < cfg.bwps.size(); ++i) { + bwps.emplace_back(cfg, sched_cfg_, cc, i); } srsran_assert(not bwps.empty(), "No BWPs were configured"); } -sched_params::sched_params(const sched_cfg_t& sched_cfg_) : sched_cfg(sched_cfg_) {} - -/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - -void get_dci_locs(const srsran_coreset_t& coreset, - const srsran_search_space_t& search_space, - uint16_t rnti, - bwp_cce_pos_list& cce_locs) -{ - for (uint32_t sl = 0; sl < SRSRAN_NOF_SF_X_FRAME; ++sl) { - for (uint32_t agg_idx = 0; agg_idx < MAX_NOF_AGGR_LEVELS; ++agg_idx) { - pdcch_cce_pos_list pdcch_locs; - cce_locs[sl][agg_idx].resize(pdcch_locs.capacity()); - uint32_t n = - srsran_pdcch_nr_locations_coreset(&coreset, &search_space, rnti, agg_idx, sl, cce_locs[sl][agg_idx].data()); - cce_locs[sl][agg_idx].resize(n); - } - } -} +sched_params::sched_params(const sched_args_t& sched_cfg_) : sched_cfg(sched_cfg_) {} /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -bwp_ue_cfg::bwp_ue_cfg(uint16_t rnti_, const bwp_params& bwp_cfg_, const ue_cfg_t& uecfg_) : +bwp_ue_cfg::bwp_ue_cfg(uint16_t rnti_, const bwp_params_t& bwp_cfg_, const ue_cfg_t& uecfg_) : rnti(rnti_), cfg_(&uecfg_), bwp_cfg(&bwp_cfg_) { std::fill(ss_id_to_cce_idx.begin(), ss_id_to_cce_idx.end(), SRSRAN_UE_DL_NR_MAX_NOF_SEARCH_SPACE); diff --git a/srsenb/src/stack/mac/nr/sched_nr_grant_allocator.cc b/srsenb/src/stack/mac/nr/sched_nr_grant_allocator.cc index 671461187..c64fdc51a 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_grant_allocator.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_grant_allocator.cc @@ -17,7 +17,7 @@ namespace srsenb { namespace sched_nr_impl { -bwp_slot_grid::bwp_slot_grid(const bwp_params& bwp_cfg_, uint32_t slot_idx_) : +bwp_slot_grid::bwp_slot_grid(const bwp_params_t& bwp_cfg_, uint32_t slot_idx_) : dl_prbs(bwp_cfg_.cfg.rb_width, bwp_cfg_.cfg.start_rb, bwp_cfg_.cfg.pdsch.rbg_size_cfg_1), ul_prbs(bwp_cfg_.cfg.rb_width, bwp_cfg_.cfg.start_rb, bwp_cfg_.cfg.pdsch.rbg_size_cfg_1), slot_idx(slot_idx_), @@ -52,7 +52,7 @@ void bwp_slot_grid::reset() rar.clear(); } -bwp_res_grid::bwp_res_grid(const bwp_params& bwp_cfg_) : cfg(&bwp_cfg_) +bwp_res_grid::bwp_res_grid(const bwp_params_t& bwp_cfg_) : cfg(&bwp_cfg_) { for (uint32_t sl = 0; sl < slots.capacity(); ++sl) { slots.emplace_back(*cfg, sl % static_cast(SRSRAN_NSLOTS_PER_FRAME_NR(0u))); @@ -161,7 +161,7 @@ alloc_result bwp_slot_allocator::alloc_rar_and_msg3(uint16_t const int mcs = 0, max_harq_msg3_retx = 4; slot_cfg.idx = msg3_slot.to_uint(); bwp_pdcch_slot.rar.emplace_back(); - sched_nr_interface::sched_rar_t& rar_out = bwp_pdcch_slot.rar.back(); + sched_nr_interface::rar_t& rar_out = bwp_pdcch_slot.rar.back(); for (const dl_sched_rar_info_t& grant : pending_rars) { slot_ue& ue = (*slot_ues)[grant.temp_crnti]; diff --git a/srsenb/src/stack/mac/nr/sched_nr_helpers.cc b/srsenb/src/stack/mac/nr/sched_nr_helpers.cc index a2905226c..f45900c81 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_helpers.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_helpers.cc @@ -22,7 +22,7 @@ namespace sched_nr_impl { //////////////////////////////////////////////////////////////////////////////////////////////////////////////////// template -void fill_dci_common(const slot_ue& ue, const bwp_params& bwp_cfg, DciDlOrUl& dci) +void fill_dci_common(const slot_ue& ue, const bwp_params_t& bwp_cfg, DciDlOrUl& dci) { const static uint32_t rv_idx[4] = {0, 2, 3, 1}; @@ -47,7 +47,7 @@ void fill_dci_common(const slot_ue& ue, const bwp_params& bwp_cfg, DciDlOrUl& dc dci.time_domain_assigment = 0; } -bool fill_dci_rar(prb_interval interv, uint16_t ra_rnti, const bwp_params& bwp_cfg, srsran_dci_dl_nr_t& dci) +bool fill_dci_rar(prb_interval interv, uint16_t ra_rnti, const bwp_params_t& bwp_cfg, srsran_dci_dl_nr_t& dci) { dci.mcs = 5; dci.ctx.format = srsran_dci_format_nr_1_0; @@ -65,7 +65,7 @@ bool fill_dci_rar(prb_interval interv, uint16_t ra_rnti, const bwp_params& bwp_c return true; } -bool fill_dci_msg3(const slot_ue& ue, const bwp_params& bwp_cfg, srsran_dci_ul_nr_t& msg3_dci) +bool fill_dci_msg3(const slot_ue& ue, const bwp_params_t& bwp_cfg, srsran_dci_ul_nr_t& msg3_dci) { fill_dci_common(ue, bwp_cfg, msg3_dci); msg3_dci.ctx.coreset_id = ue.cfg->phy().pdcch.ra_search_space.coreset_id; @@ -82,7 +82,7 @@ bool fill_dci_msg3(const slot_ue& ue, const bwp_params& bwp_cfg, srsran_dci_ul_n } void fill_dl_dci_ue_fields(const slot_ue& ue, - const bwp_params& bwp_cfg, + const bwp_params_t& bwp_cfg, uint32_t ss_id, srsran_dci_location_t dci_pos, srsran_dci_dl_nr_t& dci) @@ -101,7 +101,7 @@ void fill_dl_dci_ue_fields(const slot_ue& ue, } void fill_ul_dci_ue_fields(const slot_ue& ue, - const bwp_params& bwp_cfg, + const bwp_params_t& bwp_cfg, uint32_t ss_id, srsran_dci_location_t dci_pos, srsran_dci_ul_nr_t& dci) diff --git a/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc b/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc index dd2d8ec92..c478f05b3 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc @@ -16,11 +16,11 @@ namespace srsenb { namespace sched_nr_impl { -coreset_region::coreset_region(const bwp_params& bwp_cfg_, - uint32_t coreset_id_, - uint32_t slot_idx_, - pdcch_dl_list_t& dl_list_, - pdcch_ul_list_t& ul_list_) : +coreset_region::coreset_region(const bwp_params_t& bwp_cfg_, + uint32_t coreset_id_, + uint32_t slot_idx_, + pdcch_dl_list_t& dl_list_, + pdcch_ul_list_t& ul_list_) : coreset_cfg(&bwp_cfg_.cfg.pdcch.coreset[coreset_id_]), coreset_id(coreset_id_), slot_idx(slot_idx_), diff --git a/srsenb/src/stack/mac/nr/sched_nr_signalling.cc b/srsenb/src/stack/mac/nr/sched_nr_signalling.cc index 04f5f5b06..a3b310be7 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_signalling.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_signalling.cc @@ -75,10 +75,10 @@ void sched_ssb_basic(const slot_point& sl_point, uint32_t ssb_periodicity, ssb_l } } -void sched_dl_signalling(const bwp_params& bwp_params, - slot_point sl_pdcch, - ssb_list& ssb_list, - nzp_csi_rs_list& nzp_csi_rs) +void sched_dl_signalling(const bwp_params_t& bwp_params, + slot_point sl_pdcch, + ssb_list& ssb_list, + nzp_csi_rs_list& nzp_csi_rs) { srsran_slot_cfg_t cfg; cfg.idx = sl_pdcch.to_uint(); diff --git a/srsenb/src/stack/mac/nr/sched_nr_ue.cc b/srsenb/src/stack/mac/nr/sched_nr_ue.cc index 77cbfa86e..011591756 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_ue.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_ue.cc @@ -21,7 +21,7 @@ slot_ue::slot_ue(uint16_t rnti_, slot_point slot_rx_, uint32_t cc_) : rnti(rnti_ /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -ue_carrier::ue_carrier(uint16_t rnti_, const ue_cfg_t& uecfg_, const sched_cell_params& cell_params_) : +ue_carrier::ue_carrier(uint16_t rnti_, const ue_cfg_t& uecfg_, const cell_params_t& cell_params_) : rnti(rnti_), cc(cell_params_.cc), bwp_cfg(rnti_, cell_params_.bwps[0], uecfg_), @@ -59,7 +59,7 @@ slot_ue ue_carrier::try_reserve(slot_point pdcch_slot, sfu.dl_pending_bytes = dl_pending_bytes; sfu.ul_pending_bytes = ul_pending_bytes; - const srsran_duplex_config_nr_t& tdd_cfg = cell_params.cell_cfg.duplex; + const srsran_duplex_config_nr_t& tdd_cfg = cell_params.cfg.duplex; if (srsran_duplex_nr_is_dl(&tdd_cfg, 0, sfu.pdsch_slot.slot_idx())) { // If DL enabled sfu.h_dl = harq_ent.find_pending_dl_retx(); diff --git a/srsenb/src/stack/mac/nr/sched_nr_worker.cc b/srsenb/src/stack/mac/nr/sched_nr_worker.cc index df32ed526..0fd5d0f5e 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_worker.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_worker.cc @@ -22,7 +22,7 @@ slot_cc_worker::slot_cc_worker(serv_cell_manager& cc_sched) : cell(cc_sched), cfg(cc_sched.cfg), bwp_alloc(cc_sched.bwps[0].grid), - logger(srslog::fetch_basic_logger(cc_sched.cfg.sched_cfg.logger_name)) + logger(srslog::fetch_basic_logger(cc_sched.cfg.sched_args.logger_name)) {} void slot_cc_worker::enqueue_cc_event(srsran::move_callback ev) @@ -116,7 +116,7 @@ void slot_cc_worker::run(slot_point pdcch_slot, ue_map_t& ue_db) void slot_cc_worker::alloc_dl_ues() { - if (not cfg.sched_cfg.pdsch_enabled) { + if (not cfg.sched_args.pdsch_enabled) { return; } cell.bwps[0].data_sched->sched_dl_users(slot_ues, bwp_alloc); @@ -124,7 +124,7 @@ void slot_cc_worker::alloc_dl_ues() void slot_cc_worker::alloc_ul_ues() { - if (not cfg.sched_cfg.pusch_enabled) { + if (not cfg.sched_args.pusch_enabled) { return; } cell.bwps[0].data_sched->sched_ul_users(slot_ues, bwp_alloc); diff --git a/srsenb/test/mac/nr/sched_nr_rar_test.cc b/srsenb/test/mac/nr/sched_nr_rar_test.cc index 1104b914f..b9acd4a6c 100644 --- a/srsenb/test/mac/nr/sched_nr_rar_test.cc +++ b/srsenb/test/mac/nr/sched_nr_rar_test.cc @@ -30,15 +30,15 @@ void test_single_prach() std::default_random_engine rgen(rand_gen()); // Set scheduler configuration - sched_nr_interface::sched_cfg_t sched_cfg{}; + sched_nr_interface::sched_args_t sched_cfg{}; sched_cfg.auto_refill_buffer = std::uniform_int_distribution{0, 1}(rgen) > 0; // Set cells configuration std::vector cells_cfg = get_default_cells_cfg(1); sched_params schedparams{sched_cfg}; schedparams.cells.emplace_back(0, cells_cfg[0], sched_cfg); - const bwp_params& bwpparams = schedparams.cells[0].bwps[0]; - slot_ue_map_t slot_ues; + const bwp_params_t& bwpparams = schedparams.cells[0].bwps[0]; + slot_ue_map_t slot_ues; ra_sched rasched(bwpparams); TESTASSERT(rasched.empty()); @@ -81,7 +81,7 @@ void test_single_prach() } // A PRACH arrives... - sched_nr_interface::dl_sched_rar_info_t rainfo{}; + sched_nr_interface::rar_info_t rainfo{}; rainfo.preamble_idx = 10; rainfo.temp_crnti = rnti; rainfo.prach_slot = prach_slot; diff --git a/srsenb/test/mac/nr/sched_nr_sim_ue.cc b/srsenb/test/mac/nr/sched_nr_sim_ue.cc index 59b7766e0..5034e6cb1 100644 --- a/srsenb/test/mac/nr/sched_nr_sim_ue.cc +++ b/srsenb/test/mac/nr/sched_nr_sim_ue.cc @@ -90,7 +90,7 @@ void sched_nr_ue_sim::update_dl_harqs(const sched_nr_cc_output_res_t& cc_out) } } -sched_nr_sim_base::sched_nr_sim_base(const sched_nr_interface::sched_cfg_t& sched_args, +sched_nr_sim_base::sched_nr_sim_base(const sched_nr_interface::sched_args_t& sched_args, const std::vector& cell_cfg_list, std::string test_name_) : logger(srslog::fetch_basic_logger("TEST")), @@ -123,7 +123,7 @@ int sched_nr_sim_base::add_user(uint16_t rnti, sched_ptr->ue_cfg(rnti, ue_cfg_); ue_db.insert(std::make_pair(rnti, sched_nr_ue_sim(rnti, ue_cfg_, current_slot_tx, preamble_idx))); - sched_nr_interface::dl_sched_rar_info_t rach_info{}; + sched_nr_interface::rar_info_t rach_info{}; rach_info.temp_crnti = rnti; rach_info.prach_slot = tti_rx; rach_info.preamble_idx = preamble_idx; @@ -162,7 +162,7 @@ void sched_nr_sim_base::update(sched_nr_cc_output_res_t& cc_out) // Run common tests test_dl_pdcch_consistency(cc_out.dl_cc_result->dl_sched.pdcch_dl); test_pdsch_consistency(cc_out.dl_cc_result->dl_sched.pdsch); - test_ssb_scheduled_grant(cc_out.slot, ctxt.cell_params[cc_out.cc].cell_cfg, cc_out.dl_cc_result->dl_sched.ssb); + test_ssb_scheduled_grant(cc_out.slot, ctxt.cell_params[cc_out.cc].cfg, cc_out.dl_cc_result->dl_sched.ssb); // Run UE-dedicated tests test_dl_sched_result(ctxt, cc_out); diff --git a/srsenb/test/mac/nr/sched_nr_sim_ue.h b/srsenb/test/mac/nr/sched_nr_sim_ue.h index cecb1a050..05a347b7e 100644 --- a/srsenb/test/mac/nr/sched_nr_sim_ue.h +++ b/srsenb/test/mac/nr/sched_nr_sim_ue.h @@ -74,8 +74,8 @@ struct sim_nr_ue_ctxt_t { } }; struct sim_nr_enb_ctxt_t { - srsran::span cell_params; - std::map ue_db; + srsran::span cell_params; + std::map ue_db; }; class sched_nr_ue_sim @@ -101,7 +101,7 @@ private: class sched_nr_sim_base { public: - sched_nr_sim_base(const sched_nr_interface::sched_cfg_t& sched_args, + sched_nr_sim_base(const sched_nr_interface::sched_args_t& sched_args, const std::vector& cell_params_, std::string test_name); virtual ~sched_nr_sim_base(); @@ -129,9 +129,9 @@ public: const sched_nr_ue_sim* ret = find_rnti(rnti); return ret == nullptr ? nullptr : &ret->get_ctxt().ue_cfg; } - sched_nr* get_sched() { return sched_ptr.get(); } - srsran::const_span get_cell_params() { return cell_params; } - slot_point get_slot_rx() const + sched_nr* get_sched() { return sched_ptr.get(); } + srsran::const_span get_cell_params() { return cell_params; } + slot_point get_slot_rx() const { std::lock_guard lock(mutex); return current_slot_tx; @@ -149,11 +149,11 @@ private: int set_default_slot_events(const sim_nr_ue_ctxt_t& ue_ctxt, ue_nr_slot_events& pending_events); int apply_slot_events(sim_nr_ue_ctxt_t& ue_ctxt, const ue_nr_slot_events& events); - std::string test_name; - srslog::basic_logger& logger; - srslog::basic_logger& mac_logger; - std::unique_ptr sched_ptr; - std::vector cell_params; + std::string test_name; + srslog::basic_logger& logger; + srslog::basic_logger& mac_logger; + std::unique_ptr sched_ptr; + std::vector cell_params; slot_point current_slot_tx; int cc_finished = 0; diff --git a/srsenb/test/mac/nr/sched_nr_test.cc b/srsenb/test/mac/nr/sched_nr_test.cc index 51f995f6d..349069359 100644 --- a/srsenb/test/mac/nr/sched_nr_test.cc +++ b/srsenb/test/mac/nr/sched_nr_test.cc @@ -81,7 +81,7 @@ void sched_nr_cfg_serialized_test() uint32_t max_nof_ttis = 1000, nof_sectors = 4; task_job_manager tasks; - sched_nr_interface::sched_cfg_t cfg; + sched_nr_interface::sched_args_t cfg; cfg.auto_refill_buffer = true; std::vector cells_cfg = get_default_cells_cfg(nof_sectors); @@ -132,7 +132,7 @@ void sched_nr_cfg_parallel_cc_test() uint32_t max_nof_ttis = 1000; task_job_manager tasks; - sched_nr_interface::sched_cfg_t cfg; + sched_nr_interface::sched_args_t cfg; cfg.auto_refill_buffer = true; std::vector cells_cfg = get_default_cells_cfg(nof_sectors);