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Added NR RAR UL DCI packing

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master
Xavier Arteaga 3 years ago committed by Xavier Arteaga
parent 55d83a1279
commit b846116c5c
3 changed files with 209 additions and 74 deletions
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14
lib/include/srsran/phy/phch/dci_nr.h
Unescape Escape View File

@ -300,7 +300,7 @@ SRSRAN_API int srsran_dci_nr_ul_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_
* @param str_len Destination string length
* @return The number of written characters
*/
SRSRAN_API int srsran_dci_ctx_to_str(const srsran_dci_ctx_t* ctx, char* str, uint32_t str_len);
SRSRAN_API uint32_t srsran_dci_ctx_to_str(const srsran_dci_ctx_t* ctx, char* str, uint32_t str_len);
/**
* @brief Stringifies a DL NR DCI structure
@ -310,8 +310,10 @@ SRSRAN_API int srsran_dci_ctx_to_str(const srsran_dci_ctx_t* ctx, char* str, uin
* @param str_len Destination string length
* @return The number of written characters
*/
SRSRAN_API int
srsran_dci_dl_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci, char* str, uint32_t str_len);
SRSRAN_API uint32_t srsran_dci_dl_nr_to_str(const srsran_dci_nr_t* q,
const srsran_dci_dl_nr_t* dci,
char* str,
uint32_t str_len);
/**
* @brief Stringifies an UL NR DCI structure
@ -321,7 +323,9 @@ srsran_dci_dl_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci,
* @param str_len Destination string length
* @return The number of written characters
*/
SRSRAN_API int
srsran_dci_ul_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len);
SRSRAN_API uint32_t srsran_dci_ul_nr_to_str(const srsran_dci_nr_t* q,
const srsran_dci_ul_nr_t* dci,
char* str,
uint32_t str_len);
#endif // SRSRAN_DCI_NR_H

217
lib/src/phy/phch/dci_nr.c
Unescape Escape View File

@ -347,7 +347,7 @@ static int dci_nr_format_0_0_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_
return SRSRAN_SUCCESS;
}
static int dci_nr_format_0_0_to_str(const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len)
static uint32_t dci_nr_format_0_0_to_str(const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len)
{
uint32_t len = 0;
@ -706,7 +706,7 @@ static int dci_nr_format_0_1_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_
return SRSRAN_SUCCESS;
}
static int
static uint32_t
dci_nr_format_0_1_to_str(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len)
{
uint32_t len = 0;
@ -811,6 +811,113 @@ dci_nr_format_0_1_to_str(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci
return len;
}
static uint32_t dci_nr_rar_sizeof()
{
uint32_t count = 0;
// Frequency hopping flag - 1 bit
count += 1;
// PUSCH frequency resource allocation - 14 bits
count += 14;
// PUSCH time resource allocation - 4 bits
count += 4;
// MCS - 4 bits
count += 4;
// TPC command for PUSCH - 3 bits
count += 3;
// CSI request - 1 bits
count += 1;
return count;
}
static int dci_nr_rar_pack(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, srsran_dci_msg_nr_t* msg)
{
uint8_t* y = msg->payload;
// Frequency hopping flag - 1 bit
srsran_bit_unpack(dci->freq_hopping_flag, &y, 1);
// PUSCH frequency resource allocation - 14 bits
srsran_bit_unpack(dci->freq_domain_assigment, &y, 14);
// PUSCH time resource allocation - 4 bits
srsran_bit_unpack(dci->time_domain_assigment, &y, 4);
// MCS - 4 bits
srsran_bit_unpack(dci->mcs, &y, 4);
// TPC command for PUSCH - 3 bits
srsran_bit_unpack(dci->tpc, &y, 3);
// CSI request - 1 bits
srsran_bit_unpack(dci->csi_request, &y, 1);
return SRSRAN_SUCCESS;
}
static int dci_nr_rar_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg, srsran_dci_ul_nr_t* dci)
{
if (msg == NULL || dci == NULL) {
return SRSRAN_ERROR;
}
uint8_t* y = msg->payload;
// Copy DCI MSG fields
dci->ctx = msg->ctx;
// Frequency hopping flag - 1 bit
dci->freq_hopping_flag = srsran_bit_pack(&y, 1);
// PUSCH frequency resource allocation - 14 bits
dci->freq_domain_assigment = srsran_bit_pack(&y, 14);
// PUSCH time resource allocation - 4 bits
dci->time_domain_assigment = srsran_bit_pack(&y, 4);
// MCS -4 bits
dci->mcs = srsran_bit_pack(&y, 4);
// TPC command for PUSCH - 3 bits
dci->tpc = srsran_bit_pack(&y, 3);
// CSI request - 1 bits
dci->csi_request = srsran_bit_pack(&y, 1);
return SRSRAN_SUCCESS;
}
static uint32_t dci_nr_rar_to_str(const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len)
{
uint32_t len = 0;
// Frequency hopping flag
len = srsran_print_check(str, str_len, len, "hop=%d ", dci->freq_hopping_flag);
// PUSCH frequency resource allocation
len = srsran_print_check(str, str_len, len, "f_alloc=0x%x ", dci->freq_domain_assigment);
// PUSCH time resource allocation
len = srsran_print_check(str, str_len, len, "t_alloc=0x%x ", dci->time_domain_assigment);
// Modulation and coding scheme
len = srsran_print_check(str, str_len, len, "mcs=%d ", dci->mcs);
// TPC command for scheduled PUSCH
len = srsran_print_check(str, str_len, len, "tpc=%d ", dci->tpc);
// CSI request
len = srsran_print_check(str, str_len, len, "csi=%d ", dci->csi_request);
return len;
}
static uint32_t dci_nr_format_1_0_sizeof(uint32_t N_DL_BWP_RB, srsran_rnti_type_t rnti_type)
{
uint32_t count = 0;
@ -1123,7 +1230,7 @@ static int dci_nr_format_1_0_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_
return SRSRAN_SUCCESS;
}
static int dci_nr_format_1_0_to_str(const srsran_dci_dl_nr_t* dci, char* str, uint32_t str_len)
static uint32_t dci_nr_format_1_0_to_str(const srsran_dci_dl_nr_t* dci, char* str, uint32_t str_len)
{
uint32_t len = 0;
srsran_rnti_type_t rnti_type = dci->ctx.rnti_type;
@ -1560,7 +1667,7 @@ static int dci_nr_format_1_1_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_
return SRSRAN_SUCCESS;
}
static int
static uint32_t
dci_nr_format_1_1_to_str(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci, char* str, uint32_t str_len)
{
uint32_t len = 0;
@ -1675,6 +1782,10 @@ dci_nr_format_1_1_to_str(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci
int srsran_dci_nr_set_cfg(srsran_dci_nr_t* q, const srsran_dci_cfg_nr_t* cfg)
{
if (q == NULL || cfg == NULL) {
return SRSRAN_ERROR;
}
// Reset current setup
SRSRAN_MEM_ZERO(q, srsran_dci_nr_t, 1);
@ -1816,6 +1927,11 @@ uint32_t srsran_dci_nr_size(const srsran_dci_nr_t* q, srsran_search_space_type_t
return q->dci_1_1_size;
}
// RAR packed MSG3 DCI
if (format == srsran_dci_format_nr_rar) {
return dci_nr_rar_sizeof();
}
// Not implemented
return 0;
}
@ -1844,71 +1960,12 @@ bool srsran_dci_nr_valid_direction(const srsran_dci_msg_nr_t* dci)
return (dci->ctx.format == srsran_dci_format_nr_1_0);
}
static int dci_nr_rar_pack(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, srsran_dci_msg_nr_t* msg)
{
ERROR("Not implemented");
return SRSRAN_ERROR;
}
static int dci_nr_rar_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg, srsran_dci_ul_nr_t* dci)
int srsran_dci_nr_dl_pack(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci, srsran_dci_msg_nr_t* msg)
{
if (msg == NULL || dci == NULL) {
if (q == NULL || dci == NULL || msg == NULL) {
return SRSRAN_ERROR;
}
uint8_t* y = msg->payload;
// Copy DCI MSG fields
dci->ctx = msg->ctx;
// Frequency hopping flag - 1 bit
dci->freq_hopping_flag = srsran_bit_pack(&y, 1);
// PUSCH frequency resource allocation - 14 bits
dci->freq_domain_assigment = srsran_bit_pack(&y, 14);
// PUSCH time resource allocation - 4 bits
dci->time_domain_assigment = srsran_bit_pack(&y, 4);
// MCS -4 bits
dci->mcs = srsran_bit_pack(&y, 4);
// TPC command for PUSCH - 3 bits
dci->tpc = srsran_bit_pack(&y, 3);
// CSI request - 1 bits
dci->csi_request = srsran_bit_pack(&y, 3);
return SRSRAN_SUCCESS;
}
static int dci_nr_rar_to_str(const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len)
{
uint32_t len = 0;
// Frequency hopping flag
len = srsran_print_check(str, str_len, len, "hop=%d ", dci->freq_hopping_flag);
// PUSCH frequency resource allocation
len = srsran_print_check(str, str_len, len, "f_alloc=0x%x ", dci->freq_domain_assigment);
// PUSCH time resource allocation
len = srsran_print_check(str, str_len, len, "t_alloc=0x%x ", dci->time_domain_assigment);
// Modulation and coding scheme
len = srsran_print_check(str, str_len, len, "mcs=%d ", dci->mcs);
// TPC command for scheduled PUSCH
len = srsran_print_check(str, str_len, len, "tpc=%d ", dci->tpc);
// CSI request
len = srsran_print_check(str, str_len, len, "csi=%d ", dci->csi_request);
return len;
}
int srsran_dci_nr_dl_pack(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci, srsran_dci_msg_nr_t* msg)
{
// Copy DCI MSG fields
msg->ctx = dci->ctx;
@ -1927,6 +1984,10 @@ int srsran_dci_nr_dl_pack(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dc
int srsran_dci_nr_dl_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg, srsran_dci_dl_nr_t* dci)
{
if (q == NULL || dci == NULL || msg == NULL) {
return SRSRAN_ERROR;
}
// Copy DCI MSG fields
dci->ctx = msg->ctx;
@ -1944,6 +2005,10 @@ int srsran_dci_nr_dl_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg,
int srsran_dci_nr_ul_pack(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, srsran_dci_msg_nr_t* msg)
{
if (q == NULL || msg == NULL || dci == NULL) {
return SRSRAN_ERROR;
}
// Copy DCI MSG fields
msg->ctx = dci->ctx;
@ -1964,6 +2029,10 @@ int srsran_dci_nr_ul_pack(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dc
int srsran_dci_nr_ul_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg, srsran_dci_ul_nr_t* dci)
{
if (q == NULL || msg == NULL || dci == NULL) {
return SRSRAN_ERROR;
}
// Copy DCI MSG fields
dci->ctx = msg->ctx;
@ -1981,8 +2050,12 @@ int srsran_dci_nr_ul_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg,
return SRSRAN_ERROR;
}
int srsran_dci_ctx_to_str(const srsran_dci_ctx_t* ctx, char* str, uint32_t str_len)
uint32_t srsran_dci_ctx_to_str(const srsran_dci_ctx_t* ctx, char* str, uint32_t str_len)
{
if (ctx == NULL || str == NULL) {
return 0;
}
uint32_t len = 0;
// Print base
@ -2001,8 +2074,12 @@ int srsran_dci_ctx_to_str(const srsran_dci_ctx_t* ctx, char* str, uint32_t str_l
return len;
}
int srsran_dci_ul_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len)
uint32_t srsran_dci_ul_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, char* str, uint32_t str_len)
{
if (q == NULL || dci == NULL || str == NULL) {
return 0;
}
uint32_t len = 0;
len += srsran_dci_ctx_to_str(&dci->ctx, &str[len], str_len - len);
@ -2026,8 +2103,12 @@ int srsran_dci_ul_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t*
return len;
}
int srsran_dci_dl_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci, char* str, uint32_t str_len)
uint32_t srsran_dci_dl_nr_to_str(const srsran_dci_nr_t* q, const srsran_dci_dl_nr_t* dci, char* str, uint32_t str_len)
{
if (q == NULL || dci == NULL || str == NULL) {
return SRSRAN_ERROR;
}
uint32_t len = 0;
len += srsran_dci_ctx_to_str(&dci->ctx, &str[len], str_len - len);

52
lib/src/phy/phch/test/dci_nr_test.c
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@ -90,6 +90,7 @@ static int test_52prb_base()
TESTASSERT(srsran_dci_nr_size(&dci, srsran_search_space_type_ue, srsran_dci_format_nr_1_0) == 39);
TESTASSERT(srsran_dci_nr_size(&dci, srsran_search_space_type_ue, srsran_dci_format_nr_0_1) == 36);
TESTASSERT(srsran_dci_nr_size(&dci, srsran_search_space_type_ue, srsran_dci_format_nr_1_1) == 41);
TESTASSERT(srsran_dci_nr_size(&dci, srsran_search_space_type_rar, srsran_dci_format_nr_rar) == 27);
srsran_dci_ctx_t ctx = {};
ctx.rnti = 0x1234;
@ -193,6 +194,55 @@ static int test_52prb_base()
TESTASSERT(memcmp(&dci_tx, &dci_rx, sizeof(srsran_dci_ul_nr_t)) == 0);
}
// Test UL DCI RAR Packing/Unpacking and info
ctx.ss_type = srsran_search_space_type_rar;
ctx.format = srsran_dci_format_nr_rar;
for (uint32_t i = 0; i < nof_repetitions; i++) {
srsran_dci_ul_nr_t dci_tx = {};
dci_tx.ctx = ctx;
dci_tx.freq_domain_assigment = srsran_random_uniform_int_dist(random_gen, 0, (int)(1U << 14U) - 1); // 14 bit
dci_tx.time_domain_assigment = srsran_random_uniform_int_dist(random_gen, 0, (int)(1U << 4U) - 1); // 4 bit
dci_tx.freq_hopping_flag = srsran_random_uniform_int_dist(random_gen, 0, (int)(1U << 1U) - 1); // 1 bit
dci_tx.mcs = srsran_random_uniform_int_dist(random_gen, 0, (int)(1U << 4U) - 1); // 4 bit
dci_tx.rv = 0; // unavailable
dci_tx.ndi = 0; // unavailable
dci_tx.pid = 0; // unavailable
dci_tx.tpc = srsran_random_uniform_int_dist(random_gen, 0, (int)(1U << 3U) - 1); // 3 bit
dci_tx.frequency_offset = 0; // unavailable
dci_tx.csi_request = srsran_random_uniform_int_dist(random_gen, 0, (int)(1U << 1U) - 1); // 1 bit
dci_tx.sul = 0; // unavailable
dci_tx.cc_id = 0; // unavailable
dci_tx.bwp_id = 0; // unavailable
dci_tx.dai1 = 0; // unavailable
dci_tx.dai2 = 0; // unavailable
dci_tx.srs_id = 0; // unavailable
dci_tx.ports = 0; // unavailabale
dci_tx.srs_request = 0; // unavailabale
dci_tx.cbg_info = 0; // unavailable
dci_tx.ptrs_id = 0; // unavailable
dci_tx.beta_id = 0; // unavailable
dci_tx.dmrs_id = 0; // unavailabale
dci_tx.ulsch = 0; // unavailabale
// Pack
srsran_dci_msg_nr_t dci_msg = {};
TESTASSERT(srsran_dci_nr_ul_pack(&dci, &dci_tx, &dci_msg) == SRSRAN_SUCCESS);
// Unpack
srsran_dci_ul_nr_t dci_rx = {};
TESTASSERT(srsran_dci_nr_ul_unpack(&dci, &dci_msg, &dci_rx) == SRSRAN_SUCCESS);
// To string
char str[512];
TESTASSERT(srsran_dci_ul_nr_to_str(&dci, &dci_tx, str, (uint32_t)sizeof(str)) != 0);
INFO("Tx: %s", str);
TESTASSERT(srsran_dci_ul_nr_to_str(&dci, &dci_rx, str, (uint32_t)sizeof(str)) != 0);
INFO("Rx: %s", str);
// Assert
TESTASSERT(memcmp(&dci_tx, &dci_rx, sizeof(srsran_dci_ul_nr_t)) == 0);
}
// Test UL DCI 1_0 Packing/Unpacking and info
ctx.format = srsran_dci_format_nr_1_0;
for (uint32_t i = 0; i < nof_repetitions; i++) {
@ -246,7 +296,7 @@ static int test_52prb_base()
TESTASSERT(memcmp(&dci_tx, &dci_rx, sizeof(srsran_dci_dl_nr_t)) == 0);
}
// Test UL DCI 1_0 Packing/Unpacking and info
// Test UL DCI 1_1 Packing/Unpacking and info
ctx.format = srsran_dci_format_nr_1_1;
for (uint32_t i = 0; i < nof_repetitions; i++) {
srsran_dci_dl_nr_t dci_tx = {};

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