From 9efc3e05f364baa7cb46f20f7b3507afdad14479 Mon Sep 17 00:00:00 2001 From: Francisco Date: Tue, 12 Oct 2021 10:35:11 +0100 Subject: [PATCH] nr,sched: enable real mac and scheduler in nr_phy_test traffic tests --- test/phy/CMakeLists.txt | 108 ++++++++++++++++++++-------------------- 1 file changed, 53 insertions(+), 55 deletions(-) diff --git a/test/phy/CMakeLists.txt b/test/phy/CMakeLists.txt index 518a9b53c..795b68829 100644 --- a/test/phy/CMakeLists.txt +++ b/test/phy/CMakeLists.txt @@ -10,6 +10,7 @@ if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB) # gNb options set(NR_PHY_TEST_GNB_NOF_THREADS 1) set(NR_PHY_TEST_GNB_PHY_LOG_LEVEL "error") + set(NR_PHY_TEST_GNB_STACK_LOG_LEVEL "error") # UE options set(NR_PHY_TEST_UE_NOF_THREADS 1) @@ -17,9 +18,11 @@ if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB) # Build common arguments set(NR_PHY_TEST_COMMON_ARGS - --gnb.phy.nof_threads=${NR_PHY_TEST_GNB_NOF_THREADS} - --ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS} - --ue.phy.log.level=${NR_PHY_TEST_UE_PHY_LOG_LEVEL}) + --gnb.phy.nof_threads=${NR_PHY_TEST_GNB_NOF_THREADS} + --ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS} + --ue.phy.log.level=${NR_PHY_TEST_UE_PHY_LOG_LEVEL} + --gnb.phy.log.level=${NR_PHY_TEST_GNB_PHY_LOG_LEVEL} + --gnb.stack.log.level=${NR_PHY_TEST_GNB_STACK_LOG_LEVEL}) add_executable(nr_phy_test nr_phy_test.cc) target_link_libraries(nr_phy_test @@ -37,68 +40,63 @@ if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB) ${ATOMIC_LIBS}) # For each supported bandwidth foreach (NR_PHY_TEST_BW "10MHz" "20MHz") - # For each supported frame structure - foreach (NR_PHY_TEST_DUPLEX "FDD" "6D+4U" "FR1.15-1") - set(NR_PHY_TEST_DURATION_MS 50) + # For dummy and real scheduler + foreach (NR_PHY_TEST_MAC_DUMMY "dummymac" "realmac") + if(${NR_PHY_TEST_MAC_DUMMY} EQUAL "dummymac") + set(NR_PHY_TEST_MAC_DUMMY_FLAG true) + else() + set(NR_PHY_TEST_MAC_DUMMY_FLAG false) + endif() + # For each supported frame structure + foreach (NR_PHY_TEST_DUPLEX "FDD" "6D+4U" "FR1.15-1") + set(NR_PHY_TEST_DURATION_MS 50) - # DL flooding only - foreach (NR_PHY_TEST_PDSCH "default" "ts38101/5.2-1") - add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_${NR_PHY_TEST_DUPLEX}_dl_${NR_PHY_TEST_PDSCH} nr_phy_test - --reference=carrier=${NR_PHY_TEST_BW},duplex=${NR_PHY_TEST_DUPLEX},pdsch=${NR_PHY_TEST_PDSCH} + # DL flooding only + foreach (NR_PHY_TEST_PDSCH "default" "ts38101/5.2-1") + add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_${NR_PHY_TEST_MAC_DUMMY}_${NR_PHY_TEST_DUPLEX}_dl_${NR_PHY_TEST_PDSCH} nr_phy_test + --reference=carrier=${NR_PHY_TEST_BW},duplex=${NR_PHY_TEST_DUPLEX},pdsch=${NR_PHY_TEST_PDSCH} + --duration=${NR_PHY_TEST_DURATION_MS} + --gnb.stack.pdsch.slots=all + --gnb.stack.pdsch.start=0 # Start at RB 0 + --gnb.stack.pdsch.length=52 # Full 10 MHz BW + --gnb.stack.pdsch.mcs=27 # Maximum MCS + --gnb.stack.pusch.slots=none + --gnb.stack.use_dummy_sched=${NR_PHY_TEST_MAC_DUMMY_FLAG} # Use real/dummy NR MAC + ${NR_PHY_TEST_COMMON_ARGS} + ) + endforeach () + + # UL flooding + add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_${NR_PHY_TEST_MAC_DUMMY}_${NR_PHY_TEST_DUPLEX}_ul_only nr_phy_test + --reference=carrier=${NR_PHY_TEST_BW},duplex=${NR_PHY_TEST_DUPLEX} + --duration=${NR_PHY_TEST_DURATION_MS} + --gnb.stack.pdsch.slots=none + --gnb.stack.pusch.slots=all + --gnb.stack.pusch.start=0 # Start at RB 0 + --gnb.stack.pusch.length=52 # Full 10 MHz BW + --gnb.stack.pusch.mcs=28 # Maximum MCS + --gnb.stack.use_dummy_sched=${NR_PHY_TEST_MAC_DUMMY_FLAG} # Use real/dummy NR MAC + ${NR_PHY_TEST_COMMON_ARGS} + ) + + # DL and UL flooding + add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_${NR_PHY_TEST_MAC_DUMMY}_${NR_PHY_TEST_DUPLEX}_bidir nr_phy_test + --reference=carrier=${NR_PHY_TEST_BW},duplex=${NR_PHY_TEST_DUPLEX} --duration=${NR_PHY_TEST_DURATION_MS} --gnb.stack.pdsch.slots=all --gnb.stack.pdsch.start=0 # Start at RB 0 --gnb.stack.pdsch.length=52 # Full 10 MHz BW - --gnb.stack.pdsch.mcs=27 # Maximum MCS - --gnb.stack.pusch.slots=none + --gnb.stack.pdsch.mcs=28 # Maximum MCS + --gnb.stack.pusch.slots=all + --gnb.stack.pusch.start=0 # Start at RB 0 + --gnb.stack.pusch.length=52 # Full 10 MHz BW + --gnb.stack.pusch.mcs=28 # Maximum MCS + --gnb.stack.use_dummy_sched=${NR_PHY_TEST_MAC_DUMMY_FLAG} # Use real/dummy NR MAC ${NR_PHY_TEST_COMMON_ARGS} ) endforeach () - - # UL flooding - add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_${NR_PHY_TEST_DUPLEX}_ul_only nr_phy_test - --reference=carrier=${NR_PHY_TEST_BW},duplex=${NR_PHY_TEST_DUPLEX} - --duration=${NR_PHY_TEST_DURATION_MS} - --gnb.stack.pdsch.slots=none - --gnb.stack.pusch.slots=all - --gnb.stack.pusch.start=0 # Start at RB 0 - --gnb.stack.pusch.length=52 # Full 10 MHz BW - --gnb.stack.pusch.mcs=28 # Maximum MCS - ${NR_PHY_TEST_COMMON_ARGS} - ) - - # DL and UL flooding - add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_${NR_PHY_TEST_DUPLEX}_bidir nr_phy_test - --reference=carrier=${NR_PHY_TEST_BW},duplex=${NR_PHY_TEST_DUPLEX} - --duration=${NR_PHY_TEST_DURATION_MS} - --gnb.stack.pdsch.slots=all - --gnb.stack.pdsch.start=0 # Start at RB 0 - --gnb.stack.pdsch.length=52 # Full 10 MHz BW - --gnb.stack.pdsch.mcs=28 # Maximum MCS - --gnb.stack.pusch.slots=all - --gnb.stack.pusch.start=0 # Start at RB 0 - --gnb.stack.pusch.length=52 # Full 10 MHz BW - --gnb.stack.pusch.mcs=28 # Maximum MCS - ${NR_PHY_TEST_COMMON_ARGS} - ) endforeach () - add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_bidir_sched nr_phy_test - --reference=carrier=${NR_PHY_TEST_BW} - --duration=100 # 100 slots - --rnti=17921 # 0x4601 - --gnb.stack.pdsch.slots=0,1,2,3,4,5 # All possible DL slots - --gnb.stack.pdsch.start=0 # Start at RB 0 - --gnb.stack.pdsch.length=52 # Full 10 MHz BW - --gnb.stack.pdsch.mcs=28 # Maximum MCS - --gnb.stack.pusch.slots=6,7,8,9 # All possible UL slots - --gnb.stack.pusch.start=0 # Start at RB 0 - --gnb.stack.pusch.length=52 # Full 10 MHz BW - --gnb.stack.pusch.mcs=28 # Maximum MCS - --gnb.stack.use_dummy_sched=false # Use real NR scheduler - ${NR_PHY_TEST_COMMON_ARGS} - ) - # Test PRACH transmission and detection add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_prach_fdd nr_phy_test --reference=carrier=${NR_PHY_TEST_BW},duplex=FDD