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@ -44,8 +44,8 @@ static int pdsch_time_ra_length = -1;
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static uint32_t coreset0_idx = 0; // if ss_type=si coreset0 is used and this is the index
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static uint32_t coreset_offset_rb = 0;
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static bool interleaved_pdcch = false;
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static uint32_t dl_arfcn = 161200; // center of the NR carrier (default at 806e6 Hz)
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static uint32_t ssb_arfcn = 161290; // center of the SSB within the carrier (default at 806.45e6)
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static uint32_t dl_arfcn = 161200; // center of the NR carrier (default at 806e6 Hz)
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static uint32_t ssb_arfcn = 161290; // center of the SSB within the carrier (default at 806.45e6)
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static uint32_t coreset_n_rb = 48;
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static uint32_t coreset_len = 1;
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@ -99,8 +99,8 @@ static int parse_args(int argc, char** argv)
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rnti = (uint16_t)strtol(argv[optind], NULL, 16);
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break;
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case 't':
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pdsch_time_ra_start = (int) strtol(argv[optind++], NULL, 10);
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pdsch_time_ra_length = (int) strtol(argv[optind], NULL, 10);
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pdsch_time_ra_start = (int)strtol(argv[optind++], NULL, 10);
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pdsch_time_ra_length = (int)strtol(argv[optind], NULL, 10);
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break;
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case 'T':
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if (strcmp(argv[optind], "c") == 0) {
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@ -380,14 +380,30 @@ int main(int argc, char** argv)
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coreset->freq_resources[i] = i < coreset_n_rb / 6;
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}
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if (interleaved_pdcch) {
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coreset->mapping_type = srsran_coreset_mapping_type_interleaved;
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coreset->reg_bundle_size = srsran_coreset_bundle_size_n6;
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coreset->interleaver_size = srsran_coreset_bundle_size_n2;
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coreset->mapping_type = srsran_coreset_mapping_type_interleaved;
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coreset->reg_bundle_size = srsran_coreset_bundle_size_n6;
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coreset->interleaver_size = srsran_coreset_bundle_size_n2;
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coreset->precoder_granularity = srsran_coreset_precoder_granularity_reg_bundle;
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coreset->shift_index = carrier.pci;
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coreset->shift_index = carrier.pci;
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}
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// set coreset0 bandwidth (it is used in RA when ss_type = common3)
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dci_cfg.coreset0_bw = coreset_n_rb;
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// SCH configuration parameters
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if (pdsch_time_ra_start >= 0 && pdsch_time_ra_length >= 0) {
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auto last_pdsch_symbol = (uint16_t)(pdsch_time_ra_start + pdsch_time_ra_length);
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if (last_pdsch_symbol > SRSRAN_NSYMB_PER_SLOT_NR) {
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ERROR("incorrect PDSCH start symbol or length provided");
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return clean_exit(ret);
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}
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uint32_t sliv = srsran_sliv_from_s_and_l(SRSRAN_NSYMB_PER_SLOT_NR, pdsch_time_ra_start, pdsch_time_ra_length);
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pdsch_hl_cfg.nof_dedicated_time_ra = 1;
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pdsch_hl_cfg.dedicated_time_ra[0].mapping_type = srsran_sch_mapping_type_A;
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pdsch_hl_cfg.dedicated_time_ra[0].k = 0;
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pdsch_hl_cfg.dedicated_time_ra[0].sliv = sliv;
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}
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}
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char coreset_info[512] = {};
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@ -412,22 +428,6 @@ int main(int argc, char** argv)
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pdcch_cfg.ra_search_space = *search_space;
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pdcch_cfg.ra_search_space.type = srsran_search_space_type_common_1;
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// SCH configuration parameters
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if (pdsch_time_ra_start >= 0 && pdsch_time_ra_length >= 0) {
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auto last_pdsch_symbol = (uint16_t) (pdsch_time_ra_start + pdsch_time_ra_length);
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if (last_pdsch_symbol > SRSRAN_NSYMB_PER_SLOT_NR) {
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ERROR("incorrect PDSCH start symbol or length provided");
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return clean_exit(ret);
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}
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uint32_t sliv = srsran_sliv_from_s_and_l(SRSRAN_NSYMB_PER_SLOT_NR, pdsch_time_ra_start, pdsch_time_ra_length);
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pdsch_hl_cfg.nof_dedicated_time_ra = 1;
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pdsch_hl_cfg.dedicated_time_ra[0].mapping_type = srsran_sch_mapping_type_A;
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pdsch_hl_cfg.dedicated_time_ra[0].k = 0;
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pdsch_hl_cfg.dedicated_time_ra[0].sliv = sliv;
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}
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if (srsran_ue_dl_nr_init(&ue_dl, buffer, &ue_dl_args)) {
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ERROR("Error UE DL");
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return clean_exit(ret);
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