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nr,gnb,rrc: consistent generation of rachConfig for phy, SIB1, and NSA reconf

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master
Francisco 3 years ago committed by Francisco Paisana
parent a173c4f222
commit 79a018683f
4 changed files with 40 additions and 105 deletions
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54
srsenb/src/enb_cfg_parser.cc
Unescape Escape View File

@ -1476,60 +1476,6 @@ int set_derived_args(all_args_t* args_, rrc_cfg_t* rrc_cfg_, phy_cfg_t* phy_cfg_
*/
int set_derived_args_nr(all_args_t* args_, rrc_nr_cfg_t* rrc_nr_cfg_, phy_cfg_t* phy_cfg_)
{
// set rach cfg common
auto& rach_cfg_common = rrc_nr_cfg_->rach_cfg_common;
auto& rach_cfg_generic = rach_cfg_common.rach_cfg_generic;
uint8_t msg1_fdm = 1; // TODO read from config
if (!asn1::number_to_enum(rach_cfg_generic.msg1_fdm, msg1_fdm)) {
ERROR("Config Error: Invalid msg1_fdm (%d)\n", msg1_fdm);
return SRSRAN_ERROR;
}
rach_cfg_generic.preamb_rx_target_pwr = -110; // TODO read from config
uint8_t preamb_trans_max = 7; // TODO read from config
if (!asn1::number_to_enum(rach_cfg_generic.preamb_trans_max, preamb_trans_max)) {
ERROR("Config Error: Invalid preamble_trans_max (%d)\n", preamb_trans_max);
return SRSRAN_ERROR;
}
uint8_t pwr_ramp_step = 4; // TODO read from config
if (!asn1::number_to_enum(rach_cfg_generic.pwr_ramp_step, pwr_ramp_step)) {
ERROR("Config Error: Invalid pwr_ramp_step (%d)\n", pwr_ramp_step);
return SRSRAN_ERROR;
}
uint8_t ra_resp_win_size = 10; // TODO read from config
if (!asn1::number_to_enum(rach_cfg_generic.ra_resp_win, ra_resp_win_size)) {
ERROR("Config Error: Invalid ra_resp_win_size (%d)\n", ra_resp_win_size);
return SRSRAN_ERROR;
}
uint8_t ra_contention_resolution_timer = 64; // TODO read from config
if (!asn1::number_to_enum(rach_cfg_common.ra_contention_resolution_timer, ra_contention_resolution_timer)) {
ERROR("Config Error: Invalid mac_con_res_timer (%d)\n", ra_contention_resolution_timer);
return SRSRAN_ERROR;
}
rrc_nr_cfg_->prach_root_seq_idx_type = 839; // TODO read from config
std::string restricted_set_cfg = "unrestrictedSet"; // TODO read from config
asn1::rrc_nr::rach_cfg_common_s::prach_root_seq_idx_c_::types_opts root_seq_idx_type;
if (!asn1::string_to_enum(rach_cfg_common.restricted_set_cfg, restricted_set_cfg)) {
ERROR("Config Error: Invalid restricted_set_cfg (%s)\n", restricted_set_cfg.c_str());
return SRSRAN_ERROR;
}
rach_cfg_common.ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true;
rach_cfg_common.ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one(); // TODO read from config
uint8_t one_opts = 64; // TODO read from config
if (!asn1::number_to_enum(rach_cfg_common.ssb_per_rach_occasion_and_cb_preambs_per_ssb.one(), one_opts)) {
ERROR("Config Error: Invalid one_opts (%d)\n", one_opts);
return SRSRAN_ERROR;
}
// Use helper class to derive NR carrier parameters
srsran::srsran_band_helper band_helper;

10
srsgnb/hdr/stack/rrc/rrc_nr_config.h
Unescape Escape View File

@ -48,12 +48,10 @@ struct rrc_cell_cfg_nr_t {
typedef std::vector<rrc_cell_cfg_nr_t> rrc_cell_list_nr_t;
struct rrc_nr_cfg_t {
rrc_nr_cfg_sr_t sr_cfg;
rrc_cfg_cqi_t cqi_cfg;
rrc_cell_list_nr_t cell_list;
asn1::rrc_nr::rach_cfg_common_s rach_cfg_common;
uint16_t prach_root_seq_idx_type;
bool is_standalone;
rrc_nr_cfg_sr_t sr_cfg;
rrc_cfg_cqi_t cqi_cfg;
rrc_cell_list_nr_t cell_list;
bool is_standalone;
std::string log_name = "RRC-NR";
std::string log_level;

67
srsgnb/src/stack/rrc/cell_asn1_config.cc
Unescape Escape View File

@ -100,6 +100,28 @@ void set_coreset_from_phy_cfg(const srsran_coreset_t& coreset_cfg, asn1::rrc_nr:
// TODO: Remaining fields
}
void set_rach_cfg_common(const srsran_prach_cfg_t& prach_cfg, asn1::rrc_nr::rach_cfg_common_s& out)
{
// rach-ConfigGeneric
out.rach_cfg_generic.prach_cfg_idx = prach_cfg.config_idx;
out.rach_cfg_generic.msg1_fdm.value = rach_cfg_generic_s::msg1_fdm_opts::one;
out.rach_cfg_generic.msg1_freq_start = prach_cfg.freq_offset;
out.rach_cfg_generic.zero_correlation_zone_cfg = prach_cfg.zero_corr_zone;
out.rach_cfg_generic.preamb_rx_target_pwr = -110;
out.rach_cfg_generic.preamb_trans_max.value = rach_cfg_generic_s::preamb_trans_max_opts::n7;
out.rach_cfg_generic.pwr_ramp_step.value = rach_cfg_generic_s::pwr_ramp_step_opts::db4;
out.rach_cfg_generic.ra_resp_win.value = rach_cfg_generic_s::ra_resp_win_opts::sl10;
out.ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true;
out.ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one().value =
rach_cfg_common_s::ssb_per_rach_occasion_and_cb_preambs_per_ssb_c_::one_opts::n8;
out.ra_contention_resolution_timer.value = rach_cfg_common_s::ra_contention_resolution_timer_opts::sf64;
out.prach_root_seq_idx.set_l839() = prach_cfg.root_seq_idx;
out.restricted_set_cfg.value = rach_cfg_common_s::restricted_set_cfg_opts::unrestricted_set;
}
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
/// Fill list of CSI-ReportConfig with gNB config
int fill_csi_report_from_enb_cfg(const rrc_nr_cfg_t& cfg, csi_meas_cfg_s& csi_meas_cfg)
{
@ -638,34 +660,11 @@ int fill_freq_info_ul_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, freq_in
return SRSRAN_SUCCESS;
}
/// Fill RachConfigCommon with gNB config
int fill_rach_cfg_common_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, rach_cfg_common_s& rach_cfg_common)
{
auto& cell_cfg = cfg.cell_list.at(cc);
rach_cfg_common = cfg.rach_cfg_common;
rach_cfg_common.rach_cfg_generic.msg1_freq_start = cell_cfg.phy_cell.prach.freq_offset;
rach_cfg_common.rach_cfg_generic.prach_cfg_idx = cell_cfg.phy_cell.prach.config_idx;
rach_cfg_common.rach_cfg_generic.zero_correlation_zone_cfg = cell_cfg.phy_cell.prach.zero_corr_zone;
if (cfg.prach_root_seq_idx_type == 139) {
rach_cfg_common.prach_root_seq_idx.set_l139() = cell_cfg.phy_cell.prach.root_seq_idx;
} else if (cfg.prach_root_seq_idx_type == 839) {
rach_cfg_common.prach_root_seq_idx.set_l839() = cell_cfg.phy_cell.prach.root_seq_idx;
} else {
get_logger(cfg).error("Config Error: Invalid prach_root_seq_idx_type (%d)\n", cfg.prach_root_seq_idx_type);
return SRSRAN_ERROR;
}
return SRSRAN_SUCCESS;
}
/// Fill InitUlBwp with gNB config
int fill_init_ul_bwp_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, bwp_ul_common_s& init_ul_bwp)
{
init_ul_bwp.rach_cfg_common_present = true;
fill_rach_cfg_common_from_enb_cfg(cfg, cc, init_ul_bwp.rach_cfg_common.set_setup());
set_rach_cfg_common(cfg.cell_list[cc].phy_cell.prach, init_ul_bwp.rach_cfg_common.set_setup());
// TODO: Add missing fields
@ -992,24 +991,6 @@ void fill_dl_cfg_common_sib(const rrc_cell_cfg_nr_t& cell_cfg, dl_cfg_common_sib
cfg.pcch_cfg.ns.value = pcch_cfg_s::ns_opts::one;
}
void fill_rach_cfg_common(const rrc_cell_cfg_nr_t& cell_cfg, rach_cfg_common_s& cfg)
{
cfg.rach_cfg_generic.prach_cfg_idx = 16;
cfg.rach_cfg_generic.msg1_fdm.value = rach_cfg_generic_s::msg1_fdm_opts::one;
cfg.rach_cfg_generic.msg1_freq_start = 0;
cfg.rach_cfg_generic.zero_correlation_zone_cfg = 15;
cfg.rach_cfg_generic.preamb_rx_target_pwr = -110;
cfg.rach_cfg_generic.preamb_trans_max.value = rach_cfg_generic_s::preamb_trans_max_opts::n7;
cfg.rach_cfg_generic.pwr_ramp_step.value = rach_cfg_generic_s::pwr_ramp_step_opts::db4;
cfg.rach_cfg_generic.ra_resp_win.value = rach_cfg_generic_s::ra_resp_win_opts::sl10;
cfg.ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true;
cfg.ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one().value =
rach_cfg_common_s::ssb_per_rach_occasion_and_cb_preambs_per_ssb_c_::one_opts::n8;
cfg.ra_contention_resolution_timer.value = rach_cfg_common_s::ra_contention_resolution_timer_opts::sf64;
cfg.prach_root_seq_idx.set_l839() = 1;
cfg.restricted_set_cfg.value = rach_cfg_common_s::restricted_set_cfg_opts::unrestricted_set;
}
void fill_ul_cfg_common_sib(const rrc_cell_cfg_nr_t& cell_cfg, ul_cfg_common_sib_s& cfg)
{
srsran::srsran_band_helper band_helper;
@ -1037,7 +1018,7 @@ void fill_ul_cfg_common_sib(const rrc_cell_cfg_nr_t& cell_cfg, ul_cfg_common_sib
(subcarrier_spacing_opts::options)cell_cfg.phy_cell.carrier.scs;
cfg.init_ul_bwp.rach_cfg_common_present = true;
fill_rach_cfg_common(cell_cfg, cfg.init_ul_bwp.rach_cfg_common.set_setup());
set_rach_cfg_common(cell_cfg.phy_cell.prach, cfg.init_ul_bwp.rach_cfg_common.set_setup());
cfg.init_ul_bwp.pusch_cfg_common_present = true;
pusch_cfg_common_s& pusch = cfg.init_ul_bwp.pusch_cfg_common.set_setup();

14
srsgnb/src/stack/rrc/rrc_nr_config_utils.cc
Unescape Escape View File

@ -46,7 +46,7 @@ void generate_default_nr_phy_cell(phy_cell_cfg_nr_t& phy_cell)
// PRACH
phy_cell.prach.is_nr = true;
phy_cell.prach.config_idx = 8;
phy_cell.prach.root_seq_idx = 0;
phy_cell.prach.root_seq_idx = 1;
phy_cell.prach.freq_offset = 1;
phy_cell.prach.num_ra_preambles = phy_cell.num_ra_preambles;
phy_cell.prach.hs_flag = false;
@ -315,6 +315,16 @@ int set_derived_nr_cell_params(bool is_sa, rrc_cell_cfg_nr_t& cell)
cell.phy_cell.pdcch.ra_search_space.type = srsran_search_space_type_common_1;
// Derive remaining PHY cell params
if (is_sa) {
// PRACH
cell.phy_cell.prach.config_idx = 16;
cell.phy_cell.prach.freq_offset = 1; // msg1-FrequencyStart (zero not supported with current PRACH implementation)
cell.phy_cell.prach.zero_corr_zone = 15;
} else {
cell.phy_cell.prach.config_idx = 0;
cell.phy_cell.prach.freq_offset = 1;
cell.phy_cell.prach.zero_corr_zone = 0;
}
cell.phy_cell.prach.num_ra_preambles = cell.phy_cell.num_ra_preambles;
cell.phy_cell.prach.tdd_config.configured = (cell.duplex_mode == SRSRAN_DUPLEX_MODE_TDD);
@ -358,4 +368,4 @@ int check_nr_pdcch_cfg_valid(const srsran_pdcch_cfg_nr_t& pdcch)
return SRSRAN_SUCCESS;
}
} // namespace srsenb
} // namespace srsenb

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