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@ -926,12 +926,11 @@ void rrc::ho_failed()
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void rrc::con_reconfig_failed()
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{
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// Set previous PHY/MAC configuration
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phy_ctrl->set_config(previous_phy_cfg);
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phy_ctrl->set_cell_config(previous_phy_cfg, 0);
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mac->set_config(previous_mac_cfg);
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// And restore current configs
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current_mac_cfg = previous_mac_cfg;
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current_phy_cfg = previous_phy_cfg;
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if (security_is_activated) {
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// Start the Reestablishment Procedure
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@ -943,7 +942,7 @@ void rrc::con_reconfig_failed()
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void rrc::handle_rrc_con_reconfig(uint32_t lcid, const rrc_conn_recfg_s& reconfig)
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{
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previous_phy_cfg = current_phy_cfg;
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previous_phy_cfg = phy_ctrl->current_cell_config()[0];
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previous_mac_cfg = current_mac_cfg;
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const rrc_conn_recfg_r8_ies_s& reconfig_r8 = reconfig.crit_exts.c1().rrc_conn_recfg_r8();
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@ -1203,13 +1202,14 @@ void rrc::handle_sib2()
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}
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// Apply PHY RR Config Common
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set_phy_cfg_t_common_pdsch(¤t_phy_cfg, sib2->rr_cfg_common.pdsch_cfg_common);
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set_phy_cfg_t_common_pusch(¤t_phy_cfg, sib2->rr_cfg_common.pusch_cfg_common);
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set_phy_cfg_t_common_pucch(¤t_phy_cfg, sib2->rr_cfg_common.pucch_cfg_common);
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set_phy_cfg_t_common_pwr_ctrl(¤t_phy_cfg, sib2->rr_cfg_common.ul_pwr_ctrl_common);
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srslte::phy_cfg_t& current_pcell = phy_ctrl->current_cell_config()[0];
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set_phy_cfg_t_common_pdsch(¤t_pcell, sib2->rr_cfg_common.pdsch_cfg_common);
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set_phy_cfg_t_common_pusch(¤t_pcell, sib2->rr_cfg_common.pusch_cfg_common);
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set_phy_cfg_t_common_pucch(¤t_pcell, sib2->rr_cfg_common.pucch_cfg_common);
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set_phy_cfg_t_common_pwr_ctrl(¤t_pcell, sib2->rr_cfg_common.ul_pwr_ctrl_common);
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set_phy_cfg_t_common_prach(
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¤t_phy_cfg, &sib2->rr_cfg_common.prach_cfg.prach_cfg_info, sib2->rr_cfg_common.prach_cfg.root_seq_idx);
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set_phy_cfg_t_common_srs(¤t_phy_cfg, sib2->rr_cfg_common.srs_ul_cfg_common);
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¤t_pcell, &sib2->rr_cfg_common.prach_cfg.prach_cfg_info, sib2->rr_cfg_common.prach_cfg.root_seq_idx);
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set_phy_cfg_t_common_srs(¤t_pcell, sib2->rr_cfg_common.srs_ul_cfg_common);
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// According to 3GPP 36.331 v12 UE-EUTRA-Capability field descriptions
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// Allow 64QAM for:
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@ -1217,19 +1217,19 @@ void rrc::handle_sib2()
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// ue-CategoryUL 5 and 13 when enable64QAM (with suffix)
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// enable64QAM-v1270 shall be ignored if enable64QAM (without suffix) is false
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if (args.ue_category == 5 || (args.release >= 10 && args.ue_category == 8)) {
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set_phy_cfg_t_enable_64qam(¤t_phy_cfg, sib2->rr_cfg_common.pusch_cfg_common.pusch_cfg_basic.enable64_qam);
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set_phy_cfg_t_enable_64qam(¤t_pcell, sib2->rr_cfg_common.pusch_cfg_common.pusch_cfg_basic.enable64_qam);
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} else if (args.release >= 12 && sib2->rr_cfg_common.pusch_cfg_common.pusch_cfg_basic.enable64_qam) {
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if (args.ue_category_ul == 5 || args.ue_category_ul == 13) {
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// ASN1 Generator simplifies enable64QAM-v1270 because it is an enumeration that is always true
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set_phy_cfg_t_enable_64qam(¤t_phy_cfg, sib2->rr_cfg_common.pusch_cfg_common_v1270.is_present());
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set_phy_cfg_t_enable_64qam(¤t_pcell, sib2->rr_cfg_common.pusch_cfg_common_v1270.is_present());
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} else {
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set_phy_cfg_t_enable_64qam(¤t_phy_cfg, false);
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set_phy_cfg_t_enable_64qam(¤t_pcell, false);
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}
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} else {
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set_phy_cfg_t_enable_64qam(¤t_phy_cfg, false);
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set_phy_cfg_t_enable_64qam(¤t_pcell, false);
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}
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phy_ctrl->set_config(current_phy_cfg);
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phy_ctrl->set_cell_config(current_pcell);
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log_rr_config_common();
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@ -1873,30 +1873,31 @@ void rrc::log_rr_config_common()
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current_mac_cfg.rach_cfg.responseWindowSize,
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current_mac_cfg.rach_cfg.contentionResolutionTimer);
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const srslte::phy_cfg_t& current_pcell = phy_ctrl->current_cell_config()[0];
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rrc_log->info("Set PUSCH ConfigCommon: P0_pusch=%f, DMRS cs=%d, delta_ss=%d, N_sb=%d\n",
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current_phy_cfg.ul_cfg.power_ctrl.p0_ue_pusch,
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current_phy_cfg.ul_cfg.dmrs.cyclic_shift,
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current_phy_cfg.ul_cfg.dmrs.delta_ss,
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current_phy_cfg.ul_cfg.hopping.n_sb);
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current_pcell.ul_cfg.power_ctrl.p0_ue_pusch,
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current_pcell.ul_cfg.dmrs.cyclic_shift,
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current_pcell.ul_cfg.dmrs.delta_ss,
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current_pcell.ul_cfg.hopping.n_sb);
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rrc_log->info("Set PUCCH ConfigCommon: DeltaShift=%d, CyclicShift=%d, N1=%d, NRB=%d\n",
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current_phy_cfg.ul_cfg.pucch.delta_pucch_shift,
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current_phy_cfg.ul_cfg.pucch.N_cs,
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current_phy_cfg.ul_cfg.pucch.n1_pucch_an_cs[0][0],
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current_phy_cfg.ul_cfg.pucch.n_rb_2);
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current_pcell.ul_cfg.pucch.delta_pucch_shift,
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current_pcell.ul_cfg.pucch.N_cs,
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current_pcell.ul_cfg.pucch.n1_pucch_an_cs[0][0],
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current_pcell.ul_cfg.pucch.n_rb_2);
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rrc_log->info("Set PRACH ConfigCommon: SeqIdx=%d, HS=%s, FreqOffset=%d, ZC=%d, ConfigIndex=%d\n",
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current_phy_cfg.prach_cfg.root_seq_idx,
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current_phy_cfg.prach_cfg.hs_flag ? "yes" : "no",
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current_phy_cfg.prach_cfg.freq_offset,
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current_phy_cfg.prach_cfg.zero_corr_zone,
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current_phy_cfg.prach_cfg.config_idx);
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current_pcell.prach_cfg.root_seq_idx,
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current_pcell.prach_cfg.hs_flag ? "yes" : "no",
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current_pcell.prach_cfg.freq_offset,
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current_pcell.prach_cfg.zero_corr_zone,
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current_pcell.prach_cfg.config_idx);
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if (current_phy_cfg.ul_cfg.srs.configured) {
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if (current_pcell.ul_cfg.srs.configured) {
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rrc_log->info("Set SRS ConfigCommon: BW-Configuration=%d, SF-Configuration=%d, Simult-ACKNACK=%s\n",
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current_phy_cfg.ul_cfg.srs.bw_cfg,
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current_phy_cfg.ul_cfg.srs.subframe_config,
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current_phy_cfg.ul_cfg.srs.simul_ack ? "yes" : "no");
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current_pcell.ul_cfg.srs.bw_cfg,
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current_pcell.ul_cfg.srs.subframe_config,
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current_pcell.ul_cfg.srs.simul_ack ? "yes" : "no");
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}
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}
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@ -1908,39 +1909,40 @@ void rrc::apply_rr_config_common(rr_cfg_common_s* config, bool send_lower_layers
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set_mac_cfg_t_rach_cfg_common(¤t_mac_cfg, config->rach_cfg_common);
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}
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srslte::phy_cfg_t& current_pcell = phy_ctrl->current_cell_config()[0];
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if (config->prach_cfg.prach_cfg_info_present) {
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set_phy_cfg_t_common_prach(¤t_phy_cfg, &config->prach_cfg.prach_cfg_info, config->prach_cfg.root_seq_idx);
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set_phy_cfg_t_common_prach(¤t_pcell, &config->prach_cfg.prach_cfg_info, config->prach_cfg.root_seq_idx);
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} else {
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set_phy_cfg_t_common_prach(¤t_phy_cfg, NULL, config->prach_cfg.root_seq_idx);
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set_phy_cfg_t_common_prach(¤t_pcell, NULL, config->prach_cfg.root_seq_idx);
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}
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if (config->pdsch_cfg_common_present) {
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set_phy_cfg_t_common_pdsch(¤t_phy_cfg, config->pdsch_cfg_common);
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set_phy_cfg_t_common_pdsch(¤t_pcell, config->pdsch_cfg_common);
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}
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set_phy_cfg_t_common_pusch(¤t_phy_cfg, config->pusch_cfg_common);
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set_phy_cfg_t_common_pusch(¤t_pcell, config->pusch_cfg_common);
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if (config->phich_cfg_present) {
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// TODO
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}
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if (config->pucch_cfg_common_present) {
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set_phy_cfg_t_common_pucch(¤t_phy_cfg, config->pucch_cfg_common);
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set_phy_cfg_t_common_pucch(¤t_pcell, config->pucch_cfg_common);
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}
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if (config->srs_ul_cfg_common_present) {
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set_phy_cfg_t_common_srs(¤t_phy_cfg, config->srs_ul_cfg_common);
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set_phy_cfg_t_common_srs(¤t_pcell, config->srs_ul_cfg_common);
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}
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if (config->ul_pwr_ctrl_common_present) {
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set_phy_cfg_t_common_pwr_ctrl(¤t_phy_cfg, config->ul_pwr_ctrl_common);
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set_phy_cfg_t_common_pwr_ctrl(¤t_pcell, config->ul_pwr_ctrl_common);
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}
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log_rr_config_common();
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if (send_lower_layers) {
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mac->set_config(current_mac_cfg);
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phy_ctrl->set_config(current_phy_cfg);
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phy_ctrl->set_cell_config(current_pcell);
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}
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}
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@ -1950,46 +1952,38 @@ void rrc::log_phy_config_dedicated()
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return;
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}
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if (current_phy_cfg.dl_cfg.cqi_report.periodic_configured) {
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srslte::phy_cfg_t& current_pcell = phy_ctrl->current_cell_config()[0];
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if (current_pcell.dl_cfg.cqi_report.periodic_configured) {
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rrc_log->info("Set cqi-PUCCH-ResourceIndex=%d, cqi-pmi-ConfigIndex=%d, cqi-FormatIndicatorPeriodic=%d\n",
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current_phy_cfg.ul_cfg.pucch.n_pucch_2,
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current_phy_cfg.dl_cfg.cqi_report.pmi_idx,
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current_phy_cfg.dl_cfg.cqi_report.periodic_mode);
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current_pcell.ul_cfg.pucch.n_pucch_2,
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current_pcell.dl_cfg.cqi_report.pmi_idx,
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current_pcell.dl_cfg.cqi_report.periodic_mode);
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}
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if (current_phy_cfg.dl_cfg.cqi_report.aperiodic_configured) {
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rrc_log->info("Set cqi-ReportModeAperiodic=%d\n", current_phy_cfg.dl_cfg.cqi_report.aperiodic_mode);
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if (current_pcell.dl_cfg.cqi_report.aperiodic_configured) {
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rrc_log->info("Set cqi-ReportModeAperiodic=%d\n", current_pcell.dl_cfg.cqi_report.aperiodic_mode);
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}
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if (current_phy_cfg.ul_cfg.pucch.sr_configured) {
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rrc_log->info("Set PHY config ded: SR-n_pucch=%d, SR-ConfigIndex=%d\n",
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current_phy_cfg.ul_cfg.pucch.n_pucch_sr,
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current_phy_cfg.ul_cfg.pucch.I_sr);
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if (current_pcell.ul_cfg.pucch.sr_configured) {
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rrc_log->info("Set PHY config ded: SR-n_pucch=%d, SR-ConfigIndex=%d",
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current_pcell.ul_cfg.pucch.n_pucch_sr,
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current_pcell.ul_cfg.pucch.I_sr);
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}
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if (current_phy_cfg.ul_cfg.srs.configured) {
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if (current_pcell.ul_cfg.srs.configured) {
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rrc_log->info("Set PHY config ded: SRS-ConfigIndex=%d, SRS-bw=%d, SRS-Nrcc=%d, SRS-hop=%d, SRS-Ncs=%d\n",
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current_phy_cfg.ul_cfg.srs.I_srs,
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current_phy_cfg.ul_cfg.srs.B,
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current_phy_cfg.ul_cfg.srs.n_rrc,
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current_phy_cfg.ul_cfg.srs.b_hop,
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current_phy_cfg.ul_cfg.srs.n_srs);
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current_pcell.ul_cfg.srs.I_srs,
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current_pcell.ul_cfg.srs.B,
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current_pcell.ul_cfg.srs.n_rrc,
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current_pcell.ul_cfg.srs.b_hop,
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current_pcell.ul_cfg.srs.n_srs);
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}
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}
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// Apply default physical common and dedicated configuration
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void rrc::set_phy_default()
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{
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rrc_log->info("Setting default PHY config (common and dedicated)\n");
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current_phy_cfg.set_defaults();
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if (phy_ctrl != nullptr) {
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for (uint32_t i = 0; i < SRSLTE_MAX_CARRIERS; i++) {
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if (i == 0 or current_scell_configured[i]) {
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phy_ctrl->set_config(current_phy_cfg, i);
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current_scell_configured[i] = false;
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}
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}
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phy_ctrl->set_phy_to_default();
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} else {
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rrc_log->info("RRC not initialized. Skipping default PHY config.\n");
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}
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@ -1998,17 +1992,8 @@ void rrc::set_phy_default()
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// Apply default physical channel configs (9.2.4)
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void rrc::set_phy_config_dedicated_default()
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{
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rrc_log->info("Setting default PHY config dedicated\n");
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current_phy_cfg.set_defaults_dedicated();
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if (phy_ctrl != nullptr) {
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for (uint32_t i = 0; i < SRSLTE_MAX_CARRIERS; i++) {
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if (i == 0 or current_scell_configured[i]) {
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phy_ctrl->set_config(current_phy_cfg, i);
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current_scell_configured[i] = false;
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}
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}
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phy_ctrl->set_phy_to_default_dedicated();
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} else {
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rrc_log->info("RRC not initialized. Skipping default PHY config.\n");
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}
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@ -2019,20 +2004,17 @@ void rrc::apply_phy_config_dedicated(const phys_cfg_ded_s& phy_cnfg, bool is_han
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{
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rrc_log->info("Applying PHY config dedicated\n");
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set_phy_cfg_t_dedicated_cfg(¤t_phy_cfg, phy_cnfg);
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srslte::phy_cfg_t& current_pcell = phy_ctrl->current_cell_config()[0];
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set_phy_cfg_t_dedicated_cfg(¤t_pcell, phy_cnfg);
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if (is_handover) {
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current_phy_cfg.ul_cfg.pucch.sr_configured = false;
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current_phy_cfg.dl_cfg.cqi_report.periodic_configured = false;
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current_phy_cfg.dl_cfg.cqi_report.aperiodic_configured = false;
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current_pcell.ul_cfg.pucch.sr_configured = false;
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current_pcell.dl_cfg.cqi_report.periodic_configured = false;
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current_pcell.dl_cfg.cqi_report.aperiodic_configured = false;
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}
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log_phy_config_dedicated();
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if (phy_ctrl != nullptr) {
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phy_ctrl->set_config(current_phy_cfg);
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} else {
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rrc_log->info("RRC not initialized. Skipping PHY config.\n");
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}
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phy_ctrl->set_cell_config(current_pcell);
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}
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void rrc::apply_phy_scell_config(const scell_to_add_mod_r10_s& scell_config, bool enable_cqi)
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@ -2086,7 +2068,7 @@ void rrc::apply_phy_scell_config(const scell_to_add_mod_r10_s& scell_config, boo
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}
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// Initialize scell config with pcell cfg
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srslte::phy_cfg_t scell_cfg = current_phy_cfg;
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srslte::phy_cfg_t scell_cfg = phy_ctrl->current_cell_config()[0];
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set_phy_cfg_t_scell_config(&scell_cfg, scell_config);
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if (not enable_cqi) {
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@ -2096,11 +2078,9 @@ void rrc::apply_phy_scell_config(const scell_to_add_mod_r10_s& scell_config, boo
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if (!phy->set_scell(scell, scell_config.scell_idx_r10, earfcn)) {
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rrc_log->error("Adding SCell cc_idx=%d\n", scell_config.scell_idx_r10);
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} else if (!phy_ctrl->set_config(scell_cfg, scell_config.scell_idx_r10)) {
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} else if (!phy_ctrl->set_cell_config(scell_cfg, scell_config.scell_idx_r10)) {
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rrc_log->error("Setting SCell configuration for cc_idx=%d\n", scell_config.scell_idx_r10);
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}
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current_scell_configured[scell_config.scell_idx_r10] = true;
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}
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void rrc::log_mac_config_dedicated()
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