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enb,nr: fix NR PHY PRACH init and MAC-PHY interaction

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master
Andre Puschmann 3 years ago committed by Xavier Arteaga
parent d78cbdf9bb
commit 38f1e158a5
7 changed files with 30 additions and 22 deletions
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1
lib/include/srsran/interfaces/gnb_interfaces.h
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@ -280,6 +280,7 @@ public:
};
struct rach_info_t {
uint32_t slot_index;
uint32_t preamble;
uint32_t time_adv;
};

1
srsenb/hdr/phy/nr/worker_pool.h
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@ -41,6 +41,7 @@ private:
void rach_detected(uint32_t tti, uint32_t primary_cc_idx, uint32_t preamble_idx, uint32_t time_adv) override
{
stack_interface_phy_nr::rach_info_t rach_info = {};
rach_info.slot_index = tti;
rach_info.preamble = preamble_idx;
rach_info.time_adv = time_adv;

2
srsenb/hdr/phy/phy.h
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@ -69,7 +69,7 @@ public:
void srsran_phy_logger(phy_logger_level_t log_level, char* str);
int init_nr(const phy_cfg_t& cfg, stack_interface_phy_nr& stack);
int init_nr(const phy_args_t& args, const phy_cfg_t& cfg, stack_interface_phy_nr& stack);
int set_common_cfg(const common_cfg_t& common_cfg) override;
private:

1
srsenb/hdr/stack/mac/mac_nr.h
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@ -60,7 +60,6 @@ public:
// Interface for PHY
void process_pdus();
void rach_detected(const srsran_slot_cfg_t& slot_cfg, uint32_t enb_cc_idx, uint32_t preamble_idx, uint32_t time_adv);
int slot_indication(const srsran_slot_cfg_t& slot_cfg) override;
int get_dl_sched(const srsran_slot_cfg_t& slot_cfg, dl_sched_t& dl_sched) override;
int get_ul_sched(const srsran_slot_cfg_t& slot_cfg, ul_sched_t& ul_sched) override;

10
srsenb/src/phy/phy.cc
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@ -104,7 +104,7 @@ int phy::init(const phy_args_t& args,
return SRSRAN_ERROR;
}
if (init_nr(cfg, stack_nr_) != SRSRAN_SUCCESS) {
if (init_nr(args, cfg, stack_nr_) != SRSRAN_SUCCESS) {
phy_log.error("Couldn't initialize NR PHY");
return SRSRAN_ERROR;
}
@ -326,7 +326,7 @@ void phy::start_plot()
lte_workers[0]->start_plot();
}
int phy::init_nr(const phy_cfg_t& cfg, stack_interface_phy_nr& stack)
int phy::init_nr(const phy_args_t& args, const phy_cfg_t& cfg, stack_interface_phy_nr& stack)
{
if (cfg.phy_cell_cfg_nr.empty()) {
return SRSRAN_SUCCESS;
@ -334,9 +334,11 @@ int phy::init_nr(const phy_cfg_t& cfg, stack_interface_phy_nr& stack)
nr_workers = std::unique_ptr<nr::worker_pool>(new nr::worker_pool(workers_common, stack, log_sink, MAX_WORKERS));
nr::worker_pool::args_t args = {};
nr::worker_pool::args_t worker_args = {};
worker_args.log.phy_level = args.log.phy_level;
worker_args.log.phy_hex_limit = args.log.phy_hex_limit;
if (not nr_workers->init(args, cfg.phy_cell_cfg_nr)) {
if (not nr_workers->init(worker_args, cfg.phy_cell_cfg_nr)) {
return SRSRAN_ERROR;
}

4
srsenb/src/phy/txrx.cc
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@ -155,7 +155,9 @@ void txrx::run_thread()
// WARNING:
// - The number of ports for all cells must be the same
// - Only one NR cell is currently supported
buffer.set(rf_port, p, worker_com->get_nof_ports(0), nr_worker->get_buffer_rx(p));
if (nr_worker != nullptr) {
buffer.set(rf_port, p, worker_com->get_nof_ports(0), nr_worker->get_buffer_rx(p));
}
}
}
}

33
srsenb/src/stack/mac/nr/mac_nr.cc
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@ -59,6 +59,8 @@ int mac_nr::init(const mac_nr_args_t& args_,
std::vector<srsenb::sched_nr_interface::cell_cfg_t> cells_cfg = srsenb::get_default_cells_cfg(1);
sched.cell_cfg(cells_cfg);
detected_rachs.resize(cells_cfg.size());
bcch_bch_payload = srsran::make_byte_buffer();
if (bcch_bch_payload == nullptr) {
return SRSRAN_ERROR;
@ -111,16 +113,14 @@ int mac_nr::cell_cfg(srsenb::sched_interface::cell_cfg_t* cell_cfg)
return SRSRAN_SUCCESS;
}
void mac_nr::rach_detected(const srsran_slot_cfg_t& slot_cfg,
uint32_t enb_cc_idx,
uint32_t preamble_idx,
uint32_t time_adv)
void mac_nr::rach_detected(const rach_info_t& rach_info)
{
static srsran::mutexed_tprof<srsran::avg_time_stats> rach_tprof("rach_tprof", "MAC-NR", 1);
logger.set_context(slot_cfg.idx);
logger.set_context(rach_info.slot_index);
auto rach_tprof_meas = rach_tprof.start();
stack_task_queue.push([this, slot_cfg, enb_cc_idx, preamble_idx, time_adv, rach_tprof_meas]() mutable {
uint32_t enb_cc_idx = 0;
stack_task_queue.push([this, rach_info, enb_cc_idx, rach_tprof_meas]() mutable {
uint16_t rnti = add_ue(enb_cc_idx);
if (rnti == SRSRAN_INVALID_RNTI) {
return;
@ -147,19 +147,24 @@ void mac_nr::rach_detected(const srsran_slot_cfg_t& slot_cfg,
}
// Trigger scheduler RACH
// scheduler.dl_rach_info(enb_cc_idx, rar_info);
srsenb::sched_nr_interface::dl_sched_rar_info_t rar_info = {};
rar_info.preamble_idx = rach_info.preamble;
rar_info.temp_crnti = rnti;
rar_info.prach_slot = slot_point(0, rach_info.slot_index);
// TODO: fill remaining fields as required
sched.dl_rach_info(enb_cc_idx, rar_info);
logger.info("RACH: slot=%d, cc=%d, preamble=%d, offset=%d, temp_crnti=0x%x",
slot_cfg.idx,
rach_info.slot_index,
enb_cc_idx,
preamble_idx,
time_adv,
rach_info.preamble,
rach_info.time_adv,
rnti);
srsran::console("RACH: slot=%d, cc=%d, preamble=%d, offset=%d, temp_crnti=0x%x\n",
slot_cfg.idx,
rach_info.slot_index,
enb_cc_idx,
preamble_idx,
time_adv,
rach_info.preamble,
rach_info.time_adv,
rnti);
});
}
@ -319,6 +324,4 @@ int mac_nr::pusch_info(const srsran_slot_cfg_t& slot_cfg, const mac_interface_ph
return SRSRAN_SUCCESS;
}
void mac_nr::rach_detected(const mac_interface_phy_nr::rach_info_t& rach_info) {}
} // namespace srsenb

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