diff --git a/lib/include/srsran/asn1/rrc_nr_utils.h b/lib/include/srsran/asn1/rrc_nr_utils.h index 53ada8e9e..c9ca67aab 100644 --- a/lib/include/srsran/asn1/rrc_nr_utils.h +++ b/lib/include/srsran/asn1/rrc_nr_utils.h @@ -61,6 +61,7 @@ struct pdcch_cfg_common_s; struct pdcch_cfg_s; struct pdsch_cfg_common_s; struct pucch_cfg_common_s; +struct pucch_cfg_s; struct pusch_cfg_common_s; struct mib_s; @@ -135,6 +136,7 @@ void fill_phy_pdcch_cfg_common(const asn1::rrc_nr::pdcch_cfg_common_s& pdcch_cfg bool fill_phy_pdcch_cfg(const asn1::rrc_nr::pdcch_cfg_s& pdcch_cfg, srsran_pdcch_cfg_nr_t* pdcch); bool fill_phy_pdsch_cfg_common(const asn1::rrc_nr::pdsch_cfg_common_s& pdsch_cfg, srsran_sch_hl_cfg_nr_t* pdsch); void fill_phy_pucch_cfg_common(const asn1::rrc_nr::pucch_cfg_common_s& pucch_cfg, srsran_pucch_nr_common_cfg_t* pucch); +bool fill_phy_pucch_cfg(const asn1::rrc_nr::pucch_cfg_s& pucch_cfg, srsran_pucch_nr_hl_cfg_t* pucch); bool fill_phy_pusch_cfg_common(const asn1::rrc_nr::pusch_cfg_common_s& pusch_cfg, srsran_sch_hl_cfg_nr_t* pusch); void fill_phy_carrier_cfg(const asn1::rrc_nr::serving_cell_cfg_common_sib_s& serv_cell_cfg, srsran_carrier_nr_t* carrier_nr); diff --git a/lib/src/asn1/rrc_nr_utils.cc b/lib/src/asn1/rrc_nr_utils.cc index 3ec5905b2..0c7065132 100644 --- a/lib/src/asn1/rrc_nr_utils.cc +++ b/lib/src/asn1/rrc_nr_utils.cc @@ -1726,6 +1726,67 @@ void fill_phy_pucch_cfg_common(const asn1::rrc_nr::pucch_cfg_common_s& pucch_cfg } } +bool fill_phy_pucch_cfg(const asn1::rrc_nr::pucch_cfg_s& pucch_cfg, srsran_pucch_nr_hl_cfg_t* pucch) +{ + // sanity check to avoid pucch->sets[n] goes out of bound + if (pucch_cfg.res_set_to_add_mod_list.size() > SRSRAN_PUCCH_NR_MAX_NOF_SETS) { + return false; + } + + // iterate over the sets of resourceSetToAddModList + for (size_t n = 0; n < pucch_cfg.res_set_to_add_mod_list.size() and + pucch_cfg.res_set_to_add_mod_list.size() <= SRSRAN_PUCCH_NR_MAX_NOF_SETS; + n++) { + auto& res_set = pucch_cfg.res_set_to_add_mod_list[n]; + pucch->sets[n].nof_resources = res_set.res_list.size(); + if (res_set.max_payload_size_present) { + pucch->sets[n].max_payload_size = res_set.max_payload_size; + } + // NOTE: res_set.pucch_res_set_id does not have a corresponding field in the PHY struct + + // for each set, iterate over the elements (an element is an index). For each of the element or index, find the + // corresponding pucch_res_s object in the pucch_cfg.res_to_add_mod_list + for (size_t res_idx = 0; res_idx < res_set.res_list.size(); res_idx++) { + size_t pucch_resource_id = res_set.res_list[res_idx]; + + // Find the pucch_res_s object corresponding to pucch_resource_id in the pucch_cfg.res_to_add_mod_list + size_t m = 0; + while (m <= pucch_cfg.res_to_add_mod_list.size()) { + if (m == pucch_cfg.res_to_add_mod_list.size()) { + // if we get here, the list pucch_cfg.res_to_add_mod_list does not contain any object corresponding to + // pucch_resource_id + return false; + } + if (pucch_cfg.res_to_add_mod_list[m].pucch_res_id == pucch_resource_id) { + break; // item found, exit the loop + } + m++; + } + + // Below is the object corresponding to pucch_resource_id in the pucch_cfg.res_to_add_mod_list + const auto& asn1_resource = pucch_cfg.res_to_add_mod_list[m]; + + // sanity check to avoid pucch->sets[n].resources[res_idx] goes out of bound; + if (res_idx >= SRSRAN_PUCCH_NR_MAX_NOF_RESOURCES_PER_SET) { + return false; + } + + auto& resource = pucch->sets[n].resources[res_idx]; + uint32_t format2_rate = 0; + if (pucch_cfg.format2_present and + pucch_cfg.format2.type().value == asn1::setup_release_c::types_opts::setup and + pucch_cfg.format2.setup().max_code_rate_present) { + format2_rate = pucch_cfg.format2.setup().max_code_rate.to_number(); + } + if (not make_phy_res_config(asn1_resource, format2_rate, &resource)) { + return false; + } + } + } + + return true; +} + bool fill_phy_pdsch_cfg_common(const asn1::rrc_nr::pdsch_cfg_common_s& pdsch_cfg, srsran_sch_hl_cfg_nr_t* pdsch) { for (uint32_t i = 0; i < pdsch_cfg.pdsch_time_domain_alloc_list.size(); i++) { diff --git a/lib/src/phy/phch/ra_ul_nr.c b/lib/src/phy/phch/ra_ul_nr.c index 443725ab6..d6a154490 100644 --- a/lib/src/phy/phch/ra_ul_nr.c +++ b/lib/src/phy/phch/ra_ul_nr.c @@ -551,6 +551,27 @@ int srsran_ra_ul_nr_pucch_resource(const srsran_pucch_nr_hl_cfg_t* pucch_cfg, return SRSRAN_SUCCESS; } + for (size_t n = 0; n < SRSRAN_PUCCH_NR_MAX_NOF_SETS; n++) { + if (pucch_cfg->sets[n].nof_resources > 0) { + printf("\n ==== Set index number %zu: =====\n", n); + for (size_t k = 0; k < pucch_cfg->sets[n].nof_resources; k++) { + printf("\n PUCCH resource ID %zu", k); + printf("\n Format %u", pucch_cfg->sets[n].resources[k].format); + printf("\n Starting PRB %u", pucch_cfg->sets[n].resources[k].starting_prb); + printf("\n Second PRB %u", pucch_cfg->sets[n].resources[k].second_hop_prb); + if (pucch_cfg->sets[n].resources[k].format == SRSRAN_PUCCH_NR_FORMAT_1) { + printf("\n Num of symbols %u", pucch_cfg->sets[n].resources[k].nof_symbols); + printf("\n ICS %u \n", pucch_cfg->sets[n].resources[k].initial_cyclic_shift); + } + if (pucch_cfg->sets[n].resources[k].format == SRSRAN_PUCCH_NR_FORMAT_2) { + printf("\n Num of PRBs %u", pucch_cfg->sets[n].resources[k].nof_prb); + printf("\n Start symb idx %u", pucch_cfg->sets[n].resources[k].start_symbol_idx); + printf("\n Num of symbols %u \n", pucch_cfg->sets[n].resources[k].nof_symbols); + } + } + } + } + // Use SR PUCCH resource // - At least one positive SR // - up to 2 HARQ-ACK diff --git a/srsenb/src/phy/nr/slot_worker.cc b/srsenb/src/phy/nr/slot_worker.cc index 8735243b6..ddbdfc2cf 100644 --- a/srsenb/src/phy/nr/slot_worker.cc +++ b/srsenb/src/phy/nr/slot_worker.cc @@ -186,6 +186,10 @@ bool slot_worker::work_ul() printf("Stop here"); } + if (pucch_info[i].uci_data.cfg.nof_csi == 1 && pucch_info[i].uci_data.cfg.ack.count > 0) { + printf("Stop here"); + } + // Decode PUCCH if (srsran_gnb_ul_get_pucch(&gnb_ul, &ul_slot_cfg, diff --git a/srsgnb/src/stack/mac/sched_nr_worker.cc b/srsgnb/src/stack/mac/sched_nr_worker.cc index 861047a60..9533f6480 100644 --- a/srsgnb/src/stack/mac/sched_nr_worker.cc +++ b/srsgnb/src/stack/mac/sched_nr_worker.cc @@ -185,6 +185,10 @@ void cc_worker::postprocess_decisions(bwp_slot_allocator& bwp_alloc) continue; } + if (uci_cfg.nof_csi == 1 and uci_cfg.ack.count == 1) { + printf("Stop here"); + } + // If this slot has a SR opportunity and the selected PUCCH format is 1, consider positive SR. if (uci_cfg.o_sr > 0 and uci_cfg.ack.count > 0 and pucch.candidates.back().resource.format == SRSRAN_PUCCH_NR_FORMAT_1) { diff --git a/srsgnb/src/stack/rrc/cell_asn1_config.cc b/srsgnb/src/stack/rrc/cell_asn1_config.cc index a231b8267..8a4fd8522 100644 --- a/srsgnb/src/stack/rrc/cell_asn1_config.cc +++ b/srsgnb/src/stack/rrc/cell_asn1_config.cc @@ -215,41 +215,6 @@ int fill_csi_report_from_enb_cfg(const rrc_nr_cfg_t& cfg, csi_meas_cfg_s& csi_me } } - // the code below would be for NSA, even though this function was never called for NSA -#if 0 - csi_meas_cfg.csi_report_cfg_to_add_mod_list_present = true; - csi_meas_cfg.csi_report_cfg_to_add_mod_list.resize(1); - - auto& csi_report = csi_meas_cfg.csi_report_cfg_to_add_mod_list[0]; - csi_report.report_cfg_id = 0; - csi_report.res_for_ch_meas = 0; - csi_report.csi_im_res_for_interference_present = true; - csi_report.csi_im_res_for_interference = 1; - csi_report.report_cfg_type.set_periodic(); - csi_report.report_cfg_type.periodic().report_slot_cfg.set_slots80(); - csi_report.report_cfg_type.periodic().pucch_csi_res_list.resize(1); - csi_report.report_cfg_type.periodic().pucch_csi_res_list[0].ul_bw_part_id = 0; - csi_report.report_cfg_type.periodic().pucch_csi_res_list[0].pucch_res = 1; // was 17 in orig PCAP - csi_report.report_quant.set_cri_ri_pmi_cqi(); - // Report freq config (optional) - csi_report.report_freq_cfg_present = true; - csi_report.report_freq_cfg.cqi_format_ind_present = true; - csi_report.report_freq_cfg.cqi_format_ind = csi_report_cfg_s::report_freq_cfg_s_::cqi_format_ind_opts::wideband_cqi; - csi_report.time_restrict_for_ch_meass = csi_report_cfg_s::time_restrict_for_ch_meass_opts::not_cfgured; - csi_report.time_restrict_for_interference_meass = - asn1::rrc_nr::csi_report_cfg_s::time_restrict_for_interference_meass_opts::not_cfgured; - csi_report.group_based_beam_report.set_disabled(); - // Skip CQI table (optional) - csi_report.cqi_table_present = true; - csi_report.cqi_table = asn1::rrc_nr::csi_report_cfg_s::cqi_table_opts::table2; - csi_report.subband_size = asn1::rrc_nr::csi_report_cfg_s::subband_size_opts::value1; - - if (cfg.cell_list[0].duplex_mode == SRSRAN_DUPLEX_MODE_FDD) { - csi_report.report_cfg_type.periodic().report_slot_cfg.slots80() = 5; - } else { - csi_report.report_cfg_type.periodic().report_slot_cfg.slots80() = 7; - } -#endif return SRSRAN_SUCCESS; } diff --git a/test/phy/nr_phy_test.cc b/test/phy/nr_phy_test.cc index bf9247106..581c1f4a4 100644 --- a/test/phy/nr_phy_test.cc +++ b/test/phy/nr_phy_test.cc @@ -171,8 +171,8 @@ test_bench::args_t::args_t(int argc, char** argv) // Load default reference configuration phy_cfg = srsran::phy_cfg_nr_default_t(srsran::phy_cfg_nr_default_t::reference_cfg_t(reference_cfg_str)); -#if 0 // configure nzp +#if 0 auto& uecfg_set_0 = phy_cfg.pdsch.nzp_csi_rs_sets[0]; uecfg_set_0.trs_info = true; uecfg_set_0.count = 1;