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@ -69,6 +69,21 @@ static uint32_t dci_nr_time_res_size(uint32_t nof_time_res)
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return (uint32_t)CEIL_LOG2(nof_time_res);
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}
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static uint32_t dci_nr_ptrs_size(const srsran_dci_cfg_nr_t* cfg)
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{
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// 0 bit if PTRS-UplinkConfig is not configured and transform precoder is disabled, or if transform precoder is
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// enabled, or if maxRank=1;
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if ((!cfg->pusch_ptrs && !cfg->enable_transform_precoding) || cfg->enable_transform_precoding ||
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cfg->nof_ul_layers <= 1) {
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return 0;
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}
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// 2 bits otherwise, where Table 7.3.1.1.2-25 and 7.3.1.1.2-26 are used to indicate the association between
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// PTRS port(s) and DMRS port(s) for transmission of one PT-RS port and two PT-RS ports respectively, and
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// the DMRS ports are indicated by the Antenna ports field.
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return 2;
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}
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// Determines DCI format 0_0 according to TS 38.212 clause 7.3.1.1.1
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static uint32_t dci_nr_format_0_0_sizeof(uint32_t N_UL_BWP_RB, const srsran_dci_cfg_nr_t* cfg)
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{
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@ -311,13 +326,13 @@ static uint32_t dci_nr_format_0_1_sizeof(const srsran_dci_cfg_nr_t* cfg, srsran_
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count += 1;
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// Carrier indicator – 0 or 3 bits
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count += SRSRAN_MIN(cfg->carrier_indicator_size, 3);
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count += cfg->carrier_indicator_size;
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// UL/SUL indicator – 0 bit for UEs not configured with supplementaryUplink ... otherwise, 1 bit
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count += cfg->enable_sul ? 1 : 0;
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// Bandwidth part indicator – 0, 1 or 2 bits
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count += SRSRAN_MIN(dci_nr_bwp_id_size(cfg->nof_ul_bwp), 2);
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count += dci_nr_bwp_id_size(cfg->nof_ul_bwp);
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// Frequency domain resource assignment
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count += dci_nr_freq_resource_size(cfg->pusch_alloc_type, cfg->nof_rb_groups, cfg->bwp_ul_active_bw);
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@ -398,12 +413,7 @@ static uint32_t dci_nr_format_0_1_sizeof(const srsran_dci_cfg_nr_t* cfg, srsran_
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count += cfg->pusch_nof_cbg;
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// PTRS-DMRS association - 0 or 2 bits
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if ((!cfg->pusch_ptrs && !cfg->enable_transform_precoding) || cfg->enable_transform_precoding ||
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cfg->nof_ul_layers <= 1) {
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count += 0;
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} else {
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count += 3;
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}
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count += dci_nr_ptrs_size(cfg);
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// beta_offset indicator – 0 or 2 bits
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if (cfg->pusch_dynamic_betas) {
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@ -423,14 +433,249 @@ static uint32_t dci_nr_format_0_1_sizeof(const srsran_dci_cfg_nr_t* cfg, srsran_
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static int dci_nr_format_0_1_pack(const srsran_dci_nr_t* q, const srsran_dci_ul_nr_t* dci, srsran_dci_msg_nr_t* msg)
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{
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// TODO!
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const srsran_dci_cfg_nr_t* cfg = &q->cfg;
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srsran_rnti_type_t rnti_type = dci->ctx.rnti_type;
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if (rnti_type != srsran_rnti_type_c && rnti_type != srsran_rnti_type_cs && rnti_type != srsran_rnti_type_sp_csi &&
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rnti_type != srsran_rnti_type_mcs_c) {
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ERROR("Invalid RNTI (%s) for format 0_1", srsran_rnti_type_str(rnti_type));
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return SRSRAN_ERROR;
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}
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uint8_t* y = msg->payload;
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// Identifier for DCI formats – 1 bit
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*(y++) = 0;
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// Carrier indicator – 0 or 3 bits
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srsran_bit_unpack(dci->cc_id, &y, SRSRAN_MIN(cfg->carrier_indicator_size, 3));
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// UL/SUL indicator – 0 bit for UEs not configured with supplementaryUplink ... otherwise, 1 bit
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srsran_bit_unpack(dci->sul, &y, cfg->enable_sul ? 1 : 0);
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// Bandwidth part indicator – 0, 1 or 2 bits
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srsran_bit_unpack(dci->bwp_id, &y, dci_nr_bwp_id_size(cfg->nof_ul_bwp));
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// Frequency domain resource assignment
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srsran_bit_unpack(dci->freq_domain_assigment,
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&y,
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dci_nr_freq_resource_size(cfg->pusch_alloc_type, cfg->nof_rb_groups, cfg->bwp_ul_active_bw));
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// Time domain resource assigment - 0, 1, 2, 3, or 4 bits
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srsran_bit_unpack(dci->time_domain_assigment, &y, dci_nr_time_res_size(cfg->nof_ul_time_res));
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// Frequency hopping flag - 0 or 1 bit:
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if (cfg->pusch_alloc_type != srsran_resource_alloc_type0 && cfg->enable_hopping) {
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srsran_bit_unpack(dci->freq_hopping_flag, &y, 1);
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}
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// Modulation and coding scheme – 5 bits
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srsran_bit_unpack(dci->mcs, &y, 5);
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// New data indicator – 1 bit
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srsran_bit_unpack(dci->ndi, &y, 1);
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// Redundancy version – 2 bits
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srsran_bit_unpack(dci->rv, &y, 2);
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// HARQ process number – 4 bits
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srsran_bit_unpack(dci->pid, &y, 4);
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// 1st DAI - 1 or 2 bits
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if (cfg->pusch_tx_config_codebook == srsran_pdsch_harq_ack_codebook_semi_static) {
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srsran_bit_unpack(dci->dai1, &y, 1);
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} else {
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srsran_bit_unpack(dci->dai1, &y, 2);
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}
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// 2st DAI - 0 or 2 bits
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if (cfg->dynamic_dual_harq_ack_codebook) {
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srsran_bit_unpack(dci->dai2, &y, 1);
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}
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// TPC command for scheduled PUSCH – 2 bits
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srsran_bit_unpack(dci->tpc, &y, 2);
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// SRS resource indicator
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uint32_t N_srs = SRSRAN_MIN(1, cfg->nof_srs);
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if (cfg->pusch_tx_config_codebook) {
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uint32_t N = 0;
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for (uint32_t k = 1; k < SRSRAN_MIN(cfg->nof_ul_layers, cfg->nof_srs); k++) {
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N += cfg->nof_srs / k;
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}
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srsran_bit_unpack(dci->srs_id, &y, N);
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} else {
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srsran_bit_unpack(dci->srs_id, &y, N_srs);
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}
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// Precoding information and number of layers
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if (cfg->pusch_tx_config_codebook) {
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ERROR("Not implemented");
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return 0;
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}
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// Antenna ports
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if (!cfg->enable_transform_precoding && !cfg->pusch_dmrs_double) {
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srsran_bit_unpack(dci->ports, &y, 3);
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} else {
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ERROR("Not implemented");
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return 0;
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}
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// SRS request - 2 bits
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srsran_bit_unpack(dci->srs_request, &y, 2);
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// CSI request - 0, 1, 2, 3, 4, 5, or 6 bits
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srsran_bit_unpack(dci->csi_request, &y, SRSRAN_MIN(6, cfg->report_trigger_size));
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// CBG transmission information - 0, 2, 4, 6, or 8 bits
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srsran_bit_unpack(dci->cbg_info, &y, cfg->pusch_nof_cbg);
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// PTRS-DMRS association - 0 or 2 bits
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srsran_bit_unpack(dci->ptrs_id, &y, dci_nr_ptrs_size(cfg));
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// beta_offset indicator – 0 or 2 bits
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if (cfg->pusch_dynamic_betas) {
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srsran_bit_unpack(dci->beta_id, &y, 2);
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}
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// DMRS sequence initialization - 0 or 1 bit
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if (!cfg->enable_transform_precoding) {
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srsran_bit_unpack(dci->dmrs_id, &y, 1);
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}
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// UL-SCH indicator – 1 bit
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srsran_bit_unpack(dci->ulsch, &y, 1);
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msg->nof_bits = srsran_dci_nr_size(q, msg->ctx.ss_type, srsran_dci_format_nr_0_1);
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if (msg->nof_bits != y - msg->payload) {
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ERROR("Packed bits read (%d) do NOT match payload size (%d)", msg->nof_bits, (int)(y - msg->payload));
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return SRSRAN_ERROR;
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}
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return SRSRAN_SUCCESS;
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}
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static int dci_nr_format_0_1_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg, srsran_dci_ul_nr_t* dci)
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{
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// TODO!
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const srsran_dci_cfg_nr_t* cfg = &q->cfg;
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srsran_rnti_type_t rnti_type = dci->ctx.rnti_type;
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if (rnti_type != srsran_rnti_type_c && rnti_type != srsran_rnti_type_cs && rnti_type != srsran_rnti_type_sp_csi &&
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rnti_type != srsran_rnti_type_mcs_c) {
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ERROR("Invalid RNTI (%s) for format 0_1", srsran_rnti_type_str(rnti_type));
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return SRSRAN_ERROR;
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}
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uint8_t* y = msg->payload;
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// Identifier for DCI formats – 1 bits
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if (*(y++) != 0) {
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ERROR("Wrond DCI format");
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return SRSRAN_ERROR;
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}
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// Carrier indicator – 0 or 3 bits
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dci->cc_id = srsran_bit_pack(&y, SRSRAN_MIN(cfg->carrier_indicator_size, 3));
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// UL/SUL indicator – 0 bit for UEs not configured with supplementaryUplink ... otherwise, 1 bit
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dci->sul = srsran_bit_pack(&y, cfg->enable_sul ? 1 : 0);
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// Bandwidth part indicator – 0, 1 or 2 bits
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dci->bwp_id = srsran_bit_pack(&y, dci_nr_bwp_id_size(cfg->nof_ul_bwp));
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// Frequency domain resource assignment
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dci->freq_domain_assigment =
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srsran_bit_pack(&y, dci_nr_freq_resource_size(cfg->pusch_alloc_type, cfg->nof_rb_groups, cfg->bwp_ul_active_bw));
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// Time domain resource assigment - 0, 1, 2, 3, or 4 bits
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dci->time_domain_assigment = srsran_bit_pack(&y, dci_nr_time_res_size(cfg->nof_ul_time_res));
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// Frequency hopping flag - 0 or 1 bit:
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if (cfg->pusch_alloc_type != srsran_resource_alloc_type0 && cfg->enable_hopping) {
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dci->freq_hopping_flag = srsran_bit_pack(&y, 1);
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}
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// Modulation and coding scheme – 5 bits
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dci->mcs = srsran_bit_pack(&y, 5);
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// New data indicator – 1 bit
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dci->ndi = srsran_bit_pack(&y, 1);
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// Redundancy version – 2 bits
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dci->rv = srsran_bit_pack(&y, 2);
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// HARQ process number – 4 bits
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dci->pid = srsran_bit_pack(&y, 4);
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// 1st DAI - 1 or 2 bits
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if (cfg->pusch_tx_config_codebook == srsran_pdsch_harq_ack_codebook_semi_static) {
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dci->dai1 = srsran_bit_pack(&y, 1);
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} else {
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dci->dai1 = srsran_bit_pack(&y, 2);
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}
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// 2st DAI - 0 or 2 bits
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if (cfg->dynamic_dual_harq_ack_codebook) {
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dci->dai2 = srsran_bit_pack(&y, 2);
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}
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// TPC command for scheduled PUSCH – 2 bits
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dci->tpc = srsran_bit_pack(&y, 2);
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// SRS resource indicator
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uint32_t N_srs = SRSRAN_MIN(1, cfg->nof_srs);
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if (cfg->pusch_tx_config_codebook) {
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uint32_t N = 0;
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for (uint32_t k = 1; k < SRSRAN_MIN(cfg->nof_ul_layers, cfg->nof_srs); k++) {
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N += cfg->nof_srs / k;
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}
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dci->srs_id = srsran_bit_pack(&y, N);
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} else {
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dci->srs_id = srsran_bit_pack(&y, N_srs);
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}
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// Precoding information and number of layers
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if (cfg->pusch_tx_config_codebook) {
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ERROR("Not implemented");
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return 0;
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}
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// Antenna ports
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if (!cfg->enable_transform_precoding && !cfg->pusch_dmrs_double) {
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dci->ports = srsran_bit_pack(&y, 3);
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} else {
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ERROR("Not implemented");
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return 0;
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}
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// SRS request - 2 bits
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dci->srs_request = srsran_bit_pack(&y, 2);
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// CSI request - 0, 1, 2, 3, 4, 5, or 6 bits
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dci->csi_request = srsran_bit_pack(&y, SRSRAN_MIN(6, cfg->report_trigger_size));
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// CBG transmission information - 0, 2, 4, 6, or 8 bits
|
|
|
|
|
dci->cbg_info = srsran_bit_pack(&y, cfg->pusch_nof_cbg);
|
|
|
|
|
|
|
|
|
|
// PTRS-DMRS association - 0 or 2 bits
|
|
|
|
|
dci->ptrs_id = srsran_bit_pack(&y, dci_nr_ptrs_size(cfg));
|
|
|
|
|
|
|
|
|
|
// beta_offset indicator – 0 or 2 bits
|
|
|
|
|
if (cfg->pusch_dynamic_betas) {
|
|
|
|
|
dci->beta_id = srsran_bit_pack(&y, 2);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// DMRS sequence initialization - 0 or 1 bit
|
|
|
|
|
if (!cfg->enable_transform_precoding) {
|
|
|
|
|
dci->dmrs_id = srsran_bit_pack(&y, 1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// UL-SCH indicator – 1 bit
|
|
|
|
|
dci->ulsch = srsran_bit_pack(&y, 1);
|
|
|
|
|
|
|
|
|
|
if (msg->nof_bits != y - msg->payload) {
|
|
|
|
|
ERROR("Unpacked bits read (%d) do NOT match payload size (%d)", msg->nof_bits, (int)(y - msg->payload));
|
|
|
|
|
return SRSRAN_ERROR;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return SRSRAN_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|