mirror of https://github.com/pvnis/srsRAN_4G.git
Initial NR PBCH encoding
Xavier Arteaga
4 years ago
committed by
Andre Puschmann
parent
d66dac0ab2
commit
0aa5b14145
@ -0,0 +1,404 @@
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/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#include "srsran/phy/phch/pbch_nr.h"
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#include "srsran/phy/common/sequence.h"
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#include "srsran/phy/fec/polar/polar_chanalloc.h"
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#include "srsran/phy/modem/mod.h"
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#include "srsran/phy/utils/debug.h"
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#include "srsran/phy/utils/vector.h"
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/*
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* CRC Parameters
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*/
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#define PBCH_NR_CRC SRSRAN_LTE_CRC24C
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#define PBCH_NR_CRC_LEN 24
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/*
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* Polar code N_max
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*/
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#define PBCH_NR_POLAR_N_MAX 9U
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/*
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* Polar rate matching I_BIL
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*/
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#define pbch_nr_polar_rm_tx_IBIL 0
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/*
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* Number of generated payload bits, called A
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*/
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#define PBCH_NR_A (SRSRAN_PBCH_NR_PAYLOAD_SZ + 8)
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/*
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* Number of payload bits plus CRC
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*/
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#define PBCH_NR_K (PBCH_NR_A + PBCH_NR_CRC_LEN)
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/*
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* Number of Polar encoded bits
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*/
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#define PBCH_NR_N (1U << PBCH_NR_POLAR_N_MAX)
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/*
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* Number of RM bits
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*/
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#define PBCH_NR_E (864)
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/*
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* Number of symbols
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*/
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#define PBCH_NR_M (PBCH_NR_E / 2)
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/*
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* Number of DMRS
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*/
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#define PBCH_NR_NOF_DMRS (143)
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static int pbch_nr_init_encoder(srsran_pbch_nr_t* q, const srsran_pbch_nr_args_t* args)
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{
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// Skip encoder init if not requested
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if (!args->enable_encode) {
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return SRSRAN_SUCCESS;
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}
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srsran_polar_encoder_type_t encoder_type = SRSRAN_POLAR_ENCODER_PIPELINED;
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#ifdef LV_HAVE_AVX2
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if (!args->disable_simd) {
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encoder_type = SRSRAN_POLAR_ENCODER_AVX2;
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}
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#endif /* LV_HAVE_AVX2 */
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if (srsran_polar_encoder_init(&q->polar_encoder, encoder_type, PBCH_NR_POLAR_N_MAX) < SRSRAN_SUCCESS) {
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ERROR("Error initiating polar encoder");
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return SRSRAN_ERROR;
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}
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if (srsran_polar_rm_tx_init(&q->polar_rm_tx) < SRSRAN_SUCCESS) {
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ERROR("Error initiating polar RM");
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return SRSRAN_ERROR;
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}
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if (srsran_modem_table_lte(&q->qpsk, SRSRAN_MOD_QPSK) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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return SRSRAN_SUCCESS;
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}
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static int pbch_nr_init_decoder(srsran_pbch_nr_t* q, const srsran_pbch_nr_args_t* args)
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{
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// Skip decoder init if not requested
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if (!args->enable_decode) {
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return SRSRAN_SUCCESS;
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}
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srsran_polar_decoder_type_t decoder_type = SRSRAN_POLAR_DECODER_SSC_C;
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#ifdef LV_HAVE_AVX2
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if (!args->disable_simd) {
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decoder_type = SRSRAN_POLAR_DECODER_SSC_C_AVX2;
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}
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#endif /* LV_HAVE_AVX2 */
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if (srsran_polar_decoder_init(&q->polar_decoder, decoder_type, PBCH_NR_POLAR_N_MAX) < SRSRAN_SUCCESS) {
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ERROR("Error initiating polar decoder");
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return SRSRAN_ERROR;
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}
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if (srsran_polar_rm_rx_init_c(&q->polar_rm_rx) < SRSRAN_SUCCESS) {
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ERROR("Error initiating polar RM");
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return SRSRAN_ERROR;
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}
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return SRSRAN_SUCCESS;
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}
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int srsran_pbch_nr_init(srsran_pbch_nr_t* q, const srsran_pbch_nr_args_t* args)
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{
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if (q == NULL || args == NULL) {
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return SRSRAN_ERROR_INVALID_INPUTS;
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}
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if (!args->enable_encode && !args->enable_decode) {
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ERROR("Encoder and decoder are disabled, at least one of them shall be active");
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return SRSRAN_ERROR;
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}
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if (pbch_nr_init_encoder(q, args) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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if (pbch_nr_init_decoder(q, args) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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if (srsran_crc_init(&q->crc, PBCH_NR_CRC, PBCH_NR_CRC_LEN) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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if (srsran_polar_code_init(&q->code) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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if (srsran_polar_code_get(&q->code, PBCH_NR_K, PBCH_NR_E, PBCH_NR_POLAR_N_MAX) < SRSRAN_SUCCESS) {
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ERROR("Error Getting polar code");
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return SRSRAN_ERROR;
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}
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return SRSRAN_SUCCESS;
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}
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void srsran_pbch_nr_free(srsran_pbch_nr_t* q)
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{
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if (q == NULL) {
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return;
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}
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srsran_polar_encoder_free(&q->polar_encoder);
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srsran_polar_decoder_free(&q->polar_decoder);
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srsran_polar_rm_rx_free_c(&q->polar_rm_rx);
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srsran_polar_rm_tx_free(&q->polar_rm_tx);
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srsran_polar_code_free(&q->code);
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srsran_modem_table_free(&q->qpsk);
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SRSRAN_MEM_ZERO(q, srsran_pbch_nr_t, 1);
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}
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/*
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* Implements TS 38.212 Table 7.1.1-1: Value of PBCH payload interleaver pattern G ( j )
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*/
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static const uint32_t G[PBCH_NR_A] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
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9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
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static void
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pbch_nr_pbch_msg_pack(const srsran_pbch_nr_cfg_t* cfg, const srsran_pbch_msg_nr_t* msg, uint8_t a[PBCH_NR_A])
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{
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// Extract actual payload size
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uint32_t A_hat = SRSRAN_PBCH_NR_PAYLOAD_SZ;
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// Put SFN in a_hat[A_hat] to a_hat[A_hat + 3]
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uint32_t j_sfn = 0;
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a[G[j_sfn++]] = (uint8_t)((msg->sfn_4lsb >> 3U) & 1U); // 4th LSB of SFN
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a[G[j_sfn++]] = (uint8_t)((msg->sfn_4lsb >> 2U) & 1U); // 3th LSB of SFN
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a[G[j_sfn++]] = (uint8_t)((msg->sfn_4lsb >> 1U) & 1U); // 2th LSB of SFN
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a[G[j_sfn++]] = (uint8_t)((msg->sfn_4lsb >> 0U) & 1U); // 1th LSB of SFN
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// Put HRF in a_hat[A_hat + 4]
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a[G[10]] = (msg->hrf ? 1 : 0);
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// Put SSB related in a_hat[A_hat + 5] to a_hat[A_hat + 7]
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if (cfg->Lmax == 64) {
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a[G[11]] = (uint8_t)((msg->ssb_idx >> 5U) & 1U); // 6th bit of SSB index
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a[G[12]] = (uint8_t)((msg->ssb_idx >> 4U) & 1U); // 5th bit of SSB index
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a[G[13]] = (uint8_t)((msg->ssb_idx >> 3U) & 1U); // 4th bit of SSB index
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} else {
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a[G[11]] = (uint8_t)msg->k_ssb_msb; // 6th bit of SSB index
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a[G[12]] = 0; // Reserved
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a[G[13]] = 0; // Reserved
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}
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// Put actual payload
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uint32_t j_other = 14;
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for (uint32_t i = 0; i < A_hat; i++) {
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if (i > 0 && i < 7) {
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a[G[j_sfn++]] = msg->payload[i];
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} else {
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a[G[j_other++]] = msg->payload[i];
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}
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}
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}
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static void pbch_nr_scramble(const srsran_pbch_nr_cfg_t* cfg, const uint8_t a[PBCH_NR_A], uint8_t a_prime[PBCH_NR_A])
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{
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uint32_t i = 0;
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uint32_t j = 0;
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// Initialise sequence
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srsran_sequence_state_t sequence_state = {};
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srsran_sequence_state_init(&sequence_state, SRSRAN_SEQUENCE_MOD(cfg->N_id));
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// Select value M
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uint32_t M = PBCH_NR_A - 3;
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if (cfg->Lmax == 64) {
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M = PBCH_NR_A - 6;
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}
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// Select value v
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uint32_t v = 2 * a[G[1]] + a[G[2]];
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// Advance sequence
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srsran_sequence_state_advance(&sequence_state, M * v);
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// Generate actual sequence
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uint8_t c[PBCH_NR_A] = {};
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srsran_sequence_state_apply_bit(&sequence_state, c, c, PBCH_NR_A);
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while (i < PBCH_NR_A) {
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// a i corresponds to any one of the bits belonging to the SS/PBCH block index, the half frame index, and 2 nd and 3
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// rd least significant bits of the system frame number
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uint8_t s_i = c[j];
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// else
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if (i == G[11] || i == G[12] || i == G[13] || i == G[10] || i == G[1] || i == G[2]) {
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s_i = 0;
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} else {
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j++;
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}
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a_prime[i] = a[i] ^ s_i;
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i++;
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}
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}
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static int pbch_nr_polar_encode(srsran_pbch_nr_t* q, const uint8_t c[PBCH_NR_K], uint8_t d[PBCH_NR_K])
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{
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// Allocate channel
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uint8_t allocated[PBCH_NR_N];
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srsran_polar_chanalloc_tx(c, allocated, q->code.N, q->code.K, q->code.nPC, q->code.K_set, q->code.PC_set);
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// Encode bits
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if (srsran_polar_encoder_encode(&q->polar_encoder, allocated, d, q->code.n) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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return SRSRAN_SUCCESS;
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}
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static int pbch_nr_polar_rm_tx(srsran_pbch_nr_t* q, const uint8_t d[PBCH_NR_K], uint8_t o[PBCH_NR_E])
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{
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if (srsran_polar_rm_tx(&q->polar_rm_tx, d, o, q->code.n, PBCH_NR_E, PBCH_NR_K, pbch_nr_polar_rm_tx_IBIL) <
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SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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return SRSRAN_SUCCESS;
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}
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static void pbch_nr_scramble_tx(const srsran_pbch_nr_cfg_t* cfg,
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uint32_t ssb_idx,
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const uint8_t b[PBCH_NR_E],
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uint8_t b_hat[PBCH_NR_E])
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{
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// Initialise sequence
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srsran_sequence_state_t sequence_state = {};
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srsran_sequence_state_init(&sequence_state, SRSRAN_SEQUENCE_MOD(cfg->N_id));
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// Select value M
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uint32_t M_bit = PBCH_NR_E;
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// Select value v
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uint32_t v = (ssb_idx & 0x7U);
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if (cfg->Lmax == 4) {
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v = ssb_idx & 0x3U;
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}
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// Advance sequence
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srsran_sequence_state_advance(&sequence_state, v * M_bit);
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// Apply sequence
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srsran_sequence_state_apply_bit(&sequence_state, b, b_hat, PBCH_NR_E);
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}
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static void
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pbch_nr_mapping(const srsran_pbch_nr_cfg_t* cfg, const cf_t symbols[PBCH_NR_E], cf_t ssb_grid[SRSRAN_SSB_NOF_RE])
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{
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uint32_t count = 0;
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// PBCH DMRS shift
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uint32_t v = cfg->N_id % 4;
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// Symbol 1
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for (uint32_t k = 0; k < SRSRAN_SSB_BW_SUBC; k++) {
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// Skip DMRS
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if (k % 4 == v) {
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continue;
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}
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ssb_grid[1 * SRSRAN_SSB_BW_SUBC + k] = symbols[count++];
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}
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// Symbol 2
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for (uint32_t k = 0; k < 48; k++) {
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// Skip DMRS
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if (k % 4 == v) {
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continue;
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}
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ssb_grid[2 * SRSRAN_SSB_BW_SUBC + k] = symbols[count++];
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}
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for (uint32_t k = 192; k < SRSRAN_SSB_BW_SUBC; k++) {
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// Skip DMRS
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if (k % 4 == v) {
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continue;
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}
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ssb_grid[2 * SRSRAN_SSB_BW_SUBC + k] = symbols[count++];
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}
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// Symbol 3
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for (uint32_t k = 0; k < SRSRAN_SSB_BW_SUBC; k++) {
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// Skip DMRS
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if (k % 4 == v) {
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continue;
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}
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ssb_grid[3 * SRSRAN_SSB_BW_SUBC + k] = symbols[count++];
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}
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}
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int srsran_pbch_nr_encode(srsran_pbch_nr_t* q,
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const srsran_pbch_nr_cfg_t* cfg,
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const srsran_pbch_msg_nr_t* msg,
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cf_t ssb_grid[SRSRAN_SSB_NOF_RE])
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{
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if (q == NULL || cfg == NULL || msg == NULL || ssb_grid == NULL) {
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return SRSRAN_ERROR_INVALID_INPUTS;
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}
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// TS 38.212 7.1 Broadcast channel
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// 7.1.1 PBCH payload generation
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uint8_t a[PBCH_NR_A];
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pbch_nr_pbch_msg_pack(cfg, msg, a);
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// 7.1.2 Scrambling
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uint8_t b[PBCH_NR_K];
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pbch_nr_scramble(cfg, a, b);
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// 7.1.3 Transport block CRC attachment
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uint32_t checksum = srsran_crc_attach(&q->crc, b, PBCH_NR_A);
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INFO("NR-PBCH: checksum=%06x", checksum);
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// 7.1.4 Channel coding
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uint8_t d[PBCH_NR_K];
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if (pbch_nr_polar_encode(q, b, d) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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// 7.1.5 Rate matching
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uint8_t f[PBCH_NR_E];
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if (pbch_nr_polar_rm_tx(q, d, f) < SRSRAN_SUCCESS) {
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return SRSRAN_ERROR;
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}
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// TS 38.211 7.3.3 Physical broadcast channel
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// 7.3.3.1 Scrambling
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pbch_nr_scramble_tx(cfg, msg->ssb_idx, f, f);
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// 7.3.3.2 Modulation
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cf_t symbols[PBCH_NR_M];
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srsran_mod_modulate(&q->qpsk, f, symbols, PBCH_NR_E);
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// 7.3.3.3 Mapping to physical resources
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// 7.4.3.1.3 Mapping of PBCH and DM-RS within an SS/PBCH block
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pbch_nr_mapping(cfg, symbols, ssb_grid);
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return SRSRAN_SUCCESS;
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}
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