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@ -15,7 +15,10 @@
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#include "dummy_rx_harq_proc.h"
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#include "dummy_tx_harq_proc.h"
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#include "srsenb/hdr/stack/mac/mac_nr.h"
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#include "srsenb/hdr/stack/mac/nr/sched_nr.h"
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#include "srsenb/test/common/dummy_classes_nr.h"
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#include "srsenb/test/common/rlc_test_dummy.h"
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#include "srsenb/test/mac/nr/sched_nr_cfg_generators.h"
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#include <mutex>
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#include <set>
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@ -73,9 +76,12 @@ private:
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srsran::phy_cfg_nr_t phy_cfg = {};
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bool valid = false;
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std::unique_ptr<srsenb::sched_nr> sched;
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srsran::slot_point pdsch_slot, pusch_slot;
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srslog::basic_logger& sched_logger;
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srsran::task_scheduler task_sched;
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srsenb::rrc_nr_dummy rrc_obj;
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srsenb::rlc_dummy rlc_obj;
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std::unique_ptr<srsenb::mac_nr> mac;
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srsran::slot_point pdsch_slot, pusch_slot;
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srslog::basic_logger& sched_logger;
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std::mutex metrics_mutex;
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metrics_t metrics = {};
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@ -291,8 +297,6 @@ private:
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metrics.mac.tx_errors += tb_count;
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logger.debug("NACK received!");
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}
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sched->dl_ack_info(rnti, 0, ack_bit->pid, 0, is_ok);
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}
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// Process SR
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@ -305,13 +309,14 @@ private:
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public:
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struct args_t {
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srsran::phy_cfg_nr_t phy_cfg; ///< Physical layer configuration
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bool use_dummy_sched = true; ///< Use dummy or real NR scheduler
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uint16_t rnti = 0x1234; ///< C-RNTI
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uint32_t ss_id = 1; ///< Search Space identifier
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uint32_t pdcch_aggregation_level = 0; ///< PDCCH aggregation level
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uint32_t pdcch_dl_candidate = 0; ///< PDCCH DL DCI candidate index
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uint32_t pdcch_ul_candidate = 1; ///< PDCCH UL DCI candidate index
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srsran::phy_cfg_nr_t phy_cfg; ///< Physical layer configuration
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bool use_dummy_sched = true; ///< Use dummy or real NR scheduler
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bool wait_preamble = false; ///< Whether a UE is created automatically or the stack waits for a PRACH
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uint16_t rnti = 0x1234; ///< C-RNTI
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uint32_t ss_id = 1; ///< Search Space identifier
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uint32_t pdcch_aggregation_level = 0; ///< PDCCH aggregation level
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uint32_t pdcch_dl_candidate = 0; ///< PDCCH DL DCI candidate index
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uint32_t pdcch_ul_candidate = 1; ///< PDCCH UL DCI candidate index
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struct {
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uint32_t rb_start = 0; ///< Start frequency domain resource block
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uint32_t rb_length = 10; ///< Number of frequency domain resource blocks
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@ -335,15 +340,20 @@ public:
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srsenb::sched_nr_interface::sched_cfg_t sched_cfg{};
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sched_cfg.pdsch_enabled = args.pdsch.slots != "" and args.pdsch.slots != "none";
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sched_cfg.pusch_enabled = args.pusch.slots != "" and args.pusch.slots != "none";
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sched.reset(new srsenb::sched_nr{sched_cfg});
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mac.reset(new srsenb::mac_nr{&task_sched, sched_cfg});
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mac->init(srsenb::mac_nr_args_t{}, nullptr, nullptr, &rlc_obj, &rrc_obj);
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std::vector<srsenb::sched_nr_interface::cell_cfg_t> cells_cfg = srsenb::get_default_cells_cfg(1, phy_cfg);
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sched->cell_cfg(cells_cfg);
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mac->cell_cfg(srsenb::sched_interface::cell_cfg_t{}, cells_cfg);
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// add UE to scheduler
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srsenb::sched_nr_interface::ue_cfg_t ue_cfg = srsenb::get_default_ue_cfg(1, phy_cfg);
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ue_cfg.fixed_dl_mcs = args.pdsch.mcs;
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ue_cfg.fixed_ul_mcs = args.pusch.mcs;
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sched->ue_cfg(args.rnti, ue_cfg);
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if (not use_dummy_sched and not args.wait_preamble) {
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mac->reserve_rnti(0);
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srsenb::sched_nr_interface::ue_cfg_t ue_cfg = srsenb::get_default_ue_cfg(1, phy_cfg);
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ue_cfg.fixed_dl_mcs = args.pdsch.mcs;
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ue_cfg.fixed_ul_mcs = args.pusch.mcs;
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mac->ue_cfg(args.rnti, ue_cfg);
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}
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dl.mcs = args.pdsch.mcs;
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ul.mcs = args.pusch.mcs;
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@ -417,9 +427,7 @@ public:
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}
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if (not use_dummy_sched) {
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srsenb::sched_nr_interface::dl_sched_res_t dl_res;
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int ret = sched->get_dl_sched(pdsch_slot, 0, dl_res);
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dl_sched = dl_res.dl_sched;
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int ret = mac->get_dl_sched(slot_cfg, dl_sched);
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for (pdsch_t& pdsch : dl_sched.pdsch) {
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// Set TBS
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@ -465,7 +473,7 @@ public:
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}
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if (not use_dummy_sched) {
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int ret = sched->get_ul_sched(pusch_slot, 0, ul_sched);
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int ret = mac->get_ul_sched(slot_cfg, ul_sched);
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return ret;
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}
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@ -541,22 +549,12 @@ public:
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return SRSRAN_SUCCESS;
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}
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void dl_ack_info(uint16_t rnti_, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack)
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int pucch_info(const srsran_slot_cfg_t& slot_cfg, const pucch_info_t& pucch_info) override
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{
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if (not use_dummy_sched) {
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sched->dl_ack_info(rnti_, cc, pid, tb_idx, ack);
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mac->pucch_info(slot_cfg, pucch_info);
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}
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}
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void ul_crc_info(uint16_t rnti_, uint32_t cc, uint32_t pid, bool crc)
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{
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if (not use_dummy_sched) {
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sched->ul_crc_info(rnti_, cc, pid, crc);
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}
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}
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int pucch_info(const srsran_slot_cfg_t& slot_cfg, const pucch_info_t& pucch_info) override
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{
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// Handle UCI data
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if (not handle_uci_data(pucch_info.uci_data.cfg, pucch_info.uci_data.value)) {
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logger.error("Error handling UCI data from PUCCH reception");
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@ -588,6 +586,10 @@ public:
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int pusch_info(const srsran_slot_cfg_t& slot_cfg, pusch_info_t& pusch_info) override
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{
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if (not use_dummy_sched) {
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mac->pusch_info(slot_cfg, pusch_info);
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}
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// Handle UCI data
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if (not handle_uci_data(pusch_info.uci_cfg, pusch_info.pusch_data.uci)) {
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logger.error("Error handling UCI data from PUCCH reception");
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@ -602,23 +604,19 @@ public:
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metrics.mac.rx_brate += rx_harq_proc[pusch_info.pid].get_tbs();
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metrics.mac.rx_pkts++;
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ul_crc_info(rnti, 0, pusch_info.pid, pusch_info.pusch_data.tb[0].crc);
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return SRSRAN_SUCCESS;
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}
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void rach_detected(const rach_info_t& rach_info) override
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{
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if (not use_dummy_sched) {
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srsenb::sched_nr_interface::dl_sched_rar_info_t ra_info;
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ra_info.preamble_idx = rach_info.preamble;
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ra_info.ta_cmd = rach_info.time_adv;
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ra_info.ofdm_symbol_idx = 0;
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ra_info.msg3_size = 7;
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ra_info.freq_idx = 0;
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ra_info.prach_slot = pdsch_slot - TX_ENB_DELAY;
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ra_info.temp_crnti = rnti;
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sched->dl_rach_info(0, ra_info);
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mac->rach_detected(rach_info);
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task_sched.run_pending_tasks();
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srsenb::sched_nr_interface::ue_cfg_t ue_cfg = srsenb::get_default_ue_cfg(1, phy_cfg);
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ue_cfg.fixed_dl_mcs = ue_cfg.fixed_dl_mcs;
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ue_cfg.fixed_ul_mcs = ue_cfg.fixed_ul_mcs;
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mac->ue_cfg(rnti, ue_cfg);
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}
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std::unique_lock<std::mutex> lock(metrics_mutex);
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