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/*
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* Copyright 2013-2019 Software Radio Systems Limited
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*
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* This file is part of srsLTE.
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*
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* srsLTE is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as
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* published by the Free Software Foundation, either version 3 of
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* the License, or (at your option) any later version.
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*
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* srsLTE is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Affero General Public License for more details.
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*
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* A copy of the GNU Affero General Public License can be found in
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* the LICENSE file in the top-level directory of this distribution
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* and at http://www.gnu.org/licenses/.
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*
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*/
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#ifndef SRSLTE_SCHEDULER_TEST_COMMON_H
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#define SRSLTE_SCHEDULER_TEST_COMMON_H
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#include "scheduler_test_utils.h"
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#include "srsenb/hdr/stack/mac/scheduler.h"
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#include <random>
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namespace srsenb {
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/***************************
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* Random Utils
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**************************/
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void set_randseed(uint64_t seed);
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float randf();
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std::default_random_engine& get_rand_gen();
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// other helpers
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int extract_dl_prbmask(const srslte_cell_t& cell,
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const srslte_dci_dl_t& dci,
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srslte::bounded_bitset<100, true>* alloc_mask);
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/**************************
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* Testers
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*************************/
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class output_sched_tester
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{
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public:
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explicit output_sched_tester(const sched_cell_params_t& cell_params_) : cell_params(cell_params_) {}
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/* Check for collisions between RB allocations in the PUSCH and PUCCH */
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int test_pusch_collisions(const tti_params_t& tti_params,
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const sched_interface::ul_sched_res_t& ul_result,
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prbmask_t& ul_allocs) const;
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/* Check for collision between RB allocations in the PDSCH */
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int test_pdsch_collisions(const tti_params_t& tti_params,
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const sched_interface::dl_sched_res_t& dl_result,
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rbgmask_t& dl_mask) const;
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/* Check if SIBs are scheduled within their window */
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int test_sib_scheduling(const tti_params_t& tti_params, const sched_interface::dl_sched_res_t& dl_result) const;
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/* Check for collisions in the PDCCH */
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int test_pdcch_collisions(const sched_interface::dl_sched_res_t& dl_result,
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const sched_interface::ul_sched_res_t& ul_result,
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srslte::bounded_bitset<128, true>* used_cce) const;
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/* Check DCI params correctness */
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int test_dci_values_consistency(const sched_interface::dl_sched_res_t& dl_result,
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const sched_interface::ul_sched_res_t& ul_result) const;
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int test_all(const tti_params_t& tti_params,
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const sched_interface::dl_sched_res_t& dl_result,
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const sched_interface::ul_sched_res_t& ul_result) const;
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private:
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const sched_cell_params_t& cell_params;
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};
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class user_state_sched_tester
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{
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public:
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struct ue_state {
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tti_counter prach_tic, rar_tic, msg3_tic, msg4_tic;
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bool drb_cfg_flag = false;
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srsenb::sched_interface::ue_cfg_t user_cfg;
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uint32_t preamble_idx = 0;
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uint32_t msg3_riv = 0;
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bool is_msg3_rx(const tti_counter& tti_rx) const { return msg3_tic.is_valid() and msg3_tic <= tti_rx; }
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};
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explicit user_state_sched_tester(const std::vector<srsenb::sched::cell_cfg_t>& cell_params_) :
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cell_params(cell_params_)
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{
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}
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void new_tti(uint32_t tti_rx);
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bool user_exists(uint16_t rnti) const { return users.find(rnti) != users.end(); }
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const ue_state* get_user_state(uint16_t rnti) const
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{
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return users.count(rnti) > 0 ? &users.find(rnti)->second : nullptr;
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}
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/* Config users */
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int add_user(uint16_t rnti, uint32_t preamble_idx, const srsenb::sched_interface::ue_cfg_t& ue_cfg);
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int user_reconf(uint16_t rnti, const srsenb::sched_interface::ue_cfg_t& ue_cfg);
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int bearer_cfg(uint16_t rnti, uint32_t lcid, const srsenb::sched_interface::ue_bearer_cfg_t& bearer_cfg);
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void rem_user(uint16_t rnti);
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/* Test the timing of RAR, Msg3, Msg4 */
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int test_ra(uint32_t enb_cc_idx,
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const sched_interface::dl_sched_res_t& dl_result,
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const sched_interface::ul_sched_res_t& ul_result);
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/* Test allocs control content */
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int test_ctrl_info(uint32_t enb_cc_idx,
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const sched_interface::dl_sched_res_t& dl_result,
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const sched_interface::ul_sched_res_t& ul_result);
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/* Test correct activation of SCells */
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int test_scell_activation(uint32_t enb_cc_idx,
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const sched_interface::dl_sched_res_t& dl_result,
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const sched_interface::ul_sched_res_t& ul_result);
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int test_all(uint32_t enb_cc_idx,
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const sched_interface::dl_sched_res_t& dl_result,
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const sched_interface::ul_sched_res_t& ul_result);
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private:
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const std::vector<srsenb::sched::cell_cfg_t>& cell_params;
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std::map<uint16_t, ue_state> users;
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tti_counter tic;
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};
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class sched_result_stats
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{
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public:
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explicit sched_result_stats(std::vector<srsenb::sched::cell_cfg_t> cell_params_) :
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cell_params(std::move(cell_params_))
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{
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}
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void process_results(const tti_params_t& tti_params,
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const std::vector<sched_interface::dl_sched_res_t>& dl_result,
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const std::vector<sched_interface::ul_sched_res_t>& ul_result);
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struct user_stats {
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uint16_t rnti;
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std::vector<uint64_t> tot_dl_sched_data; // includes retxs
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std::vector<uint64_t> tot_ul_sched_data;
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};
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std::map<uint16_t, user_stats> users;
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private:
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user_stats* get_user(uint16_t rnti);
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const std::vector<srsenb::sched::cell_cfg_t> cell_params;
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};
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// Intrusive Scheduler Tester
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class common_sched_tester : public sched
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{
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public:
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struct tti_info_t {
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tti_params_t tti_params{10241};
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uint32_t nof_prachs = 0;
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std::vector<sched_interface::dl_sched_res_t> dl_sched_result;
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std::vector<sched_interface::ul_sched_res_t> ul_sched_result;
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};
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~common_sched_tester() override = default;
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int sim_cfg(sim_sched_args args);
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virtual int add_user(uint16_t rnti, const ue_cfg_t& ue_cfg_);
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virtual void rem_user(uint16_t rnti);
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int process_ack_txs();
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int schedule_acks();
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virtual int process_results();
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int process_tti_events(const tti_ev& tti_ev);
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int test_next_ttis(const std::vector<tti_ev>& tti_events);
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int run_tti(const tti_ev& tti_events);
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// args
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sim_sched_args sim_args0; ///< arguments used to generate TTI events
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srslte::log* tester_log = nullptr;
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// tti specific params
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tti_info_t tti_info;
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tti_counter tic;
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// testers
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std::vector<output_sched_tester> output_tester;
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std::unique_ptr<user_state_sched_tester> ue_tester;
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std::unique_ptr<sched_result_stats> sched_stats;
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protected:
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struct ack_info_t {
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uint16_t rnti;
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uint32_t tti;
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uint32_t enb_cc_idx;
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uint32_t ue_cc_idx;
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bool ack = false;
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uint32_t retx_delay = 0;
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srsenb::dl_harq_proc dl_harq;
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};
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struct ul_ack_info_t {
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uint16_t rnti;
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uint32_t tti_ack, tti_tx_ul;
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uint32_t ue_cc_idx;
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uint32_t enb_cc_idx;
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bool ack = false;
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srsenb::ul_harq_proc ul_harq;
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};
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virtual void new_test_tti();
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virtual void before_sched() {}
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// control params
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std::multimap<uint32_t, ack_info_t> to_ack;
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std::multimap<uint32_t, ul_ack_info_t> to_ul_ack;
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};
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} // namespace srsenb
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#endif // SRSLTE_SCHEDULER_TEST_COMMON_H
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