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/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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/******************************************************************************
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* File: dci.h
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*
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* Description: Downlink control information (DCI).
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* Packing/Unpacking functions to convert between bit streams
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* and packed DCI UL/DL grants defined in ra.h
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*
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* Reference: 3GPP TS 36.212 version 10.0.0 Release 10 Sec. 5.3.3
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*****************************************************************************/
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#ifndef SRSRAN_DCI_H
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#define SRSRAN_DCI_H
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#include <stdint.h>
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#include "srsran/config.h"
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#include "srsran/phy/common/phy_common.h"
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#include "srsran/phy/phch/ra.h"
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#define SRSRAN_DCI_MAX_BITS 128
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#define SRSRAN_RAR_GRANT_LEN 20
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#define SRSRAN_DCI_IS_TB_EN(tb) (!(tb.mcs_idx == 0 && tb.rv == 1))
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#define SRSRAN_DCI_TB_DISABLE(tb) \
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do { \
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tb.mcs_idx = 0; \
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tb.rv = 1; \
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} while (0)
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#define SRSRAN_DCI_HEXDEBUG 0
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typedef struct {
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bool multiple_csi_request_enabled;
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bool cif_enabled;
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bool cif_present;
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bool srs_request_enabled;
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bool ra_format_enabled;
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bool is_not_ue_ss;
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} srsran_dci_cfg_t;
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typedef struct SRSRAN_API {
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uint32_t L; // Aggregation level (logarithmic)
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uint32_t ncce; // Position of first CCE of the dci
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} srsran_dci_location_t;
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typedef struct SRSRAN_API {
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uint8_t payload[SRSRAN_DCI_MAX_BITS];
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uint32_t nof_bits;
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srsran_dci_location_t location;
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srsran_dci_format_t format;
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uint16_t rnti;
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} srsran_dci_msg_t;
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typedef struct SRSRAN_API {
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uint32_t mcs_idx;
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int rv;
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bool ndi;
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uint32_t cw_idx;
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} srsran_dci_tb_t;
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typedef struct SRSRAN_API {
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uint16_t rnti;
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srsran_dci_format_t format;
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srsran_dci_location_t location;
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uint32_t ue_cc_idx;
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// Resource Allocation
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srsran_ra_type_t alloc_type;
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union {
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srsran_ra_type0_t type0_alloc;
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srsran_ra_type1_t type1_alloc;
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srsran_ra_type2_t type2_alloc;
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};
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// Codeword information
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srsran_dci_tb_t tb[SRSRAN_MAX_CODEWORDS];
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bool tb_cw_swap;
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uint32_t pinfo;
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// Power control
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bool pconf;
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bool power_offset;
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uint8_t tpc_pucch;
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// RA order
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bool is_ra_order;
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uint32_t ra_preamble;
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uint32_t ra_mask_idx;
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// Release 10
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uint32_t cif;
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bool cif_present;
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bool srs_request;
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bool srs_request_present;
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// Other parameters
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uint32_t pid;
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uint32_t dai;
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bool is_tdd;
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bool is_dwpts;
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bool sram_id;
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// For debugging purposes
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#if SRSRAN_DCI_HEXDEBUG
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uint32_t nof_bits;
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char hex_str[SRSRAN_DCI_MAX_BITS];
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#endif
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} srsran_dci_dl_t;
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/** Unpacked DCI Format0 message */
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typedef struct SRSRAN_API {
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uint16_t rnti;
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srsran_dci_format_t format;
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srsran_dci_location_t location;
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uint32_t ue_cc_idx;
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srsran_ra_type2_t type2_alloc;
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/* 36.213 Table 8.4-2: SRSRAN_RA_PUSCH_HOP_HALF is 0 for < 10 Mhz and 10 for > 10 Mhz.
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* SRSRAN_RA_PUSCH_HOP_QUART is 00 for > 10 Mhz and SRSRAN_RA_PUSCH_HOP_QUART_NEG is 01 for > 10 Mhz.
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*/
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enum {
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SRSRAN_RA_PUSCH_HOP_DISABLED = -1,
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SRSRAN_RA_PUSCH_HOP_QUART = 0,
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SRSRAN_RA_PUSCH_HOP_QUART_NEG = 1,
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SRSRAN_RA_PUSCH_HOP_HALF = 2,
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SRSRAN_RA_PUSCH_HOP_TYPE2 = 3
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} freq_hop_fl;
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// Codeword information
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srsran_dci_tb_t tb;
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uint32_t n_dmrs;
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bool cqi_request;
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// TDD parametres
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uint32_t dai;
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uint32_t ul_idx;
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bool is_tdd;
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// Power control
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uint8_t tpc_pusch;
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// Release 10
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uint32_t cif;
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bool cif_present;
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uint8_t multiple_csi_request;
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bool multiple_csi_request_present;
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bool srs_request;
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bool srs_request_present;
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srsran_ra_type_t ra_type;
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bool ra_type_present;
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// For debugging purposes
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#if SRSRAN_DCI_HEXDEBUG
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uint32_t nof_bits;
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char hex_str[SRSRAN_DCI_MAX_BITS];
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#endif /* SRSRAN_DCI_HEXDEBUG */
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} srsran_dci_ul_t;
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typedef struct SRSRAN_API {
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uint32_t rba;
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uint32_t trunc_mcs;
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uint32_t tpc_pusch;
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bool ul_delay;
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bool cqi_request;
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bool hopping_flag;
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} srsran_dci_rar_grant_t;
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SRSRAN_API void srsran_dci_rar_unpack(uint8_t payload[SRSRAN_RAR_GRANT_LEN], srsran_dci_rar_grant_t* rar);
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SRSRAN_API void srsran_dci_rar_pack(srsran_dci_rar_grant_t* rar, uint8_t payload[SRSRAN_RAR_GRANT_LEN]);
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SRSRAN_API int srsran_dci_rar_to_ul_dci(srsran_cell_t* cell, srsran_dci_rar_grant_t* rar, srsran_dci_ul_t* dci_ul);
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SRSRAN_API int srsran_dci_msg_pack_pusch(srsran_cell_t* cell,
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srsran_dl_sf_cfg_t* sf,
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srsran_dci_cfg_t* cfg,
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srsran_dci_ul_t* dci,
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srsran_dci_msg_t* msg);
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SRSRAN_API int srsran_dci_msg_unpack_pusch(srsran_cell_t* cell,
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srsran_dl_sf_cfg_t* sf,
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srsran_dci_cfg_t* cfg,
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srsran_dci_msg_t* msg,
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srsran_dci_ul_t* dci);
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SRSRAN_API int srsran_dci_msg_pack_pdsch(srsran_cell_t* cell,
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srsran_dl_sf_cfg_t* sf,
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srsran_dci_cfg_t* cfg,
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srsran_dci_dl_t* dci,
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srsran_dci_msg_t* msg);
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SRSRAN_API int srsran_dci_msg_unpack_pdsch(srsran_cell_t* cell,
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srsran_dl_sf_cfg_t* sf,
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srsran_dci_cfg_t* cfg,
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srsran_dci_msg_t* msg,
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srsran_dci_dl_t* dci);
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SRSRAN_API uint32_t srsran_dci_format_sizeof(const srsran_cell_t* cell,
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srsran_dl_sf_cfg_t* sf,
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srsran_dci_cfg_t* cfg,
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srsran_dci_format_t format);
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SRSRAN_API void srsran_dci_dl_fprint(FILE* f, srsran_dci_dl_t* dci, uint32_t nof_prb);
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SRSRAN_API uint32_t srsran_dci_dl_info(const srsran_dci_dl_t* dci_dl, char* str, uint32_t str_len);
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SRSRAN_API uint32_t srsran_dci_ul_info(srsran_dci_ul_t* dci_ul, char* info_str, uint32_t len);
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SRSRAN_API srsran_dci_format_t srsran_dci_format_from_string(char* str);
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SRSRAN_API char* srsran_dci_format_string(srsran_dci_format_t format);
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SRSRAN_API char* srsran_dci_format_string_short(srsran_dci_format_t format);
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SRSRAN_API bool
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srsran_location_find(const srsran_dci_location_t* locations, uint32_t nof_locations, srsran_dci_location_t x);
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SRSRAN_API bool srsran_location_find_location(const srsran_dci_location_t* locations,
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uint32_t nof_locations,
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const srsran_dci_location_t* location);
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SRSRAN_API int srsran_dci_location_set(srsran_dci_location_t* c, uint32_t L, uint32_t nCCE);
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SRSRAN_API bool srsran_dci_location_isvalid(srsran_dci_location_t* c);
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SRSRAN_API void srsran_dci_cfg_set_common_ss(srsran_dci_cfg_t* cfg);
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SRSRAN_API uint32_t srsran_dci_format_max_tb(srsran_dci_format_t format);
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#endif // DCI_
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