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/*
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* Copyright 2013-2019 Software Radio Systems Limited
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*
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* This file is part of srsLTE.
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*
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* srsLTE is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as
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* published by the Free Software Foundation, either version 3 of
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* the License, or (at your option) any later version.
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*
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* srsLTE is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Affero General Public License for more details.
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*
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* A copy of the GNU Affero General Public License can be found in
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* the LICENSE file in the top-level directory of this distribution
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* and at http://www.gnu.org/licenses/.
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*
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*/
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#include "lib/include/srslte/common/pdu.h"
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#include "scheduler_test_common.h"
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#include "scheduler_test_utils.h"
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#include "srsenb/hdr/stack/mac/scheduler.h"
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using namespace srsenb;
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template <class MapContainer, class Predicate>
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void erase_if(MapContainer& c, Predicate should_remove)
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{
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for (auto it = c.begin(); it != c.end();) {
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if (should_remove(*it)) {
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it = c.erase(it);
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} else {
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++it;
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}
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}
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}
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/*******************
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* Logging *
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*******************/
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class sched_test_log final : public srslte::test_log_filter
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{
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public:
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sched_test_log() : srslte::test_log_filter("TEST") { exit_on_error = true; }
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~sched_test_log() override { log_diagnostics(); }
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void log_diagnostics() override
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{
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info("[TESTER] Number of assertion warnings: %u\n", warn_counter);
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info("[TESTER] Number of assertion errors: %u\n", error_counter);
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info("[TESTER] This was the seed: %u\n", seed);
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}
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};
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srslte::scoped_log<sched_test_log> log_global{};
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/******************************
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* Scheduler Tester for CA
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*****************************/
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class sched_ca_tester : public srsenb::sched
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{
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public:
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struct tti_info_t {
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tti_params_t tti_params{10241};
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uint32_t nof_prachs = 0;
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std::vector<sched_interface::dl_sched_res_t> dl_sched_result;
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std::vector<sched_interface::ul_sched_res_t> ul_sched_result;
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};
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int cell_cfg(const std::vector<cell_cfg_t>& cell_params) final;
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int add_user(uint16_t rnti, const ue_cfg_t& ue_cfg_);
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void new_test_tti(uint32_t tti_rx);
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int process_tti_events(const tti_ev& tti_events);
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int process_ack_txs();
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int set_acks();
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void run_tti(uint32_t tti, const tti_ev& tti_events);
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int process_results();
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// args
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sim_sched_args sim_args; ///< arguments used to generate TTI events
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// tti specific params
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tti_info_t tti_info;
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uint32_t tti_counter = 0;
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// testers
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std::vector<output_sched_tester> output_tester;
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std::unique_ptr<user_state_sched_tester> ue_tester;
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std::unique_ptr<sched_result_stats> sched_stats;
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private:
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struct ack_info_t {
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uint16_t rnti;
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uint32_t tti;
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uint32_t ue_cc_idx;
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bool ack = false;
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uint32_t retx_delay = 0;
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srsenb::dl_harq_proc dl_harq;
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};
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struct ul_ack_info_t {
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uint16_t rnti;
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uint32_t tti_ack, tti_tx_ul;
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uint32_t ue_cc_idx;
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bool ack = false;
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srsenb::ul_harq_proc ul_harq;
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};
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std::multimap<uint32_t, ack_info_t> to_ack;
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std::multimap<uint32_t, ul_ack_info_t> to_ul_ack;
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};
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int sched_ca_tester::cell_cfg(const std::vector<cell_cfg_t>& cell_params)
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{
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sched::cell_cfg(cell_params); // call parent
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ue_tester.reset(new user_state_sched_tester{cell_params});
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sched_stats.reset(new sched_result_stats{cell_params});
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output_tester.clear();
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output_tester.reserve(cell_params.size());
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for (uint32_t i = 0; i < cell_params.size(); ++i) {
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output_tester.emplace_back(sched_cell_params[i]);
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}
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return SRSLTE_SUCCESS;
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}
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int sched_ca_tester::add_user(uint16_t rnti, const ue_cfg_t& ue_cfg_)
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{
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CONDERROR(ue_cfg(rnti, ue_cfg_) != SRSLTE_SUCCESS, "[TESTER] Configuring new user rnti=0x%x to sched\n", rnti);
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dl_sched_rar_info_t rar_info = {};
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rar_info.prach_tti = tti_info.tti_params.tti_rx;
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rar_info.temp_crnti = rnti;
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rar_info.msg3_size = 7;
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rar_info.preamble_idx = tti_info.nof_prachs++;
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uint32_t pcell_idx = ue_cfg_.supported_cc_list[0].enb_cc_idx;
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dl_rach_info(pcell_idx, rar_info);
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ue_tester->add_user(rnti, rar_info.preamble_idx, ue_cfg_);
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log_global->info("[TESTER] Adding user rnti=0x%x\n", rnti);
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return SRSLTE_SUCCESS;
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}
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void sched_ca_tester::new_test_tti(uint32_t tti_rx)
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{
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tti_info.tti_params = tti_params_t{tti_rx};
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tti_info.nof_prachs = 0;
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tti_info.dl_sched_result.clear();
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tti_info.ul_sched_result.clear();
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ue_tester->new_tti(tti_rx);
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}
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int sched_ca_tester::process_tti_events(const tti_ev& tti_ev)
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{
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for (const tti_ev::user_cfg_ev& ue_ev : tti_ev.user_updates) {
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// There is a new configuration
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if (ue_ev.ue_cfg != nullptr) {
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if (not ue_tester->user_exists(ue_ev.rnti)) {
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// new user
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TESTASSERT(add_user(ue_ev.rnti, *ue_ev.ue_cfg) == SRSLTE_SUCCESS);
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} else {
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// reconfiguration
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TESTASSERT(ue_cfg(ue_ev.rnti, *ue_ev.ue_cfg) == SRSLTE_SUCCESS);
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ue_tester->user_reconf(ue_ev.rnti, *ue_ev.ue_cfg);
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}
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}
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// There is a user to remove
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if (ue_ev.rem_user) {
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// bearer_ue_rem(ue_ev.rnti, 0);
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ue_rem(ue_ev.rnti);
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ue_tester->rem_user(ue_ev.rnti);
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log_global->info("[TESTER] Removing user rnti=0x%x\n", ue_ev.rnti);
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}
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// configure carriers
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if (ue_ev.bearer_cfg != nullptr) {
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CONDERROR(not ue_tester->user_exists(ue_ev.rnti), "User rnti=0x%x does not exist\n", ue_ev.rnti);
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// TODO: Instantiate more bearers
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bearer_ue_cfg(ue_ev.rnti, 0, ue_ev.bearer_cfg.get());
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}
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// push UL SRs and DL packets
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if (ue_ev.buffer_ev != nullptr) {
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auto* user = ue_tester->get_user_state(ue_ev.rnti);
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CONDERROR(user == nullptr, "TESTER ERROR: Trying to schedule data for user that does not exist\n");
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if (ue_ev.buffer_ev->dl_data > 0) {
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// If Msg3 has already been received
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if (user->msg3_tti >= 0 and (uint32_t) user->msg3_tti <= tti_info.tti_params.tti_rx) {
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// If Msg4 not yet sent, allocate data in SRB0 buffer
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uint32_t lcid = (user->msg4_tti >= 0) ? 2 : 0;
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uint32_t pending_dl_new_data = ue_db[ue_ev.rnti].get_pending_dl_new_data();
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if (lcid == 2 and not user->drb_cfg_flag) {
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// If RRCSetup finished
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if (pending_dl_new_data == 0) {
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// setup lcid==2 bearer
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sched::ue_bearer_cfg_t cfg = {};
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cfg.direction = ue_bearer_cfg_t::BOTH;
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ue_tester->bearer_cfg(ue_ev.rnti, 2, cfg);
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bearer_ue_cfg(ue_ev.rnti, 2, &cfg);
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} else {
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// Let SRB0 get emptied
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continue;
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}
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}
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// Update DL buffer
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uint32_t tot_dl_data = pending_dl_new_data + ue_ev.buffer_ev->dl_data; // TODO: derive pending based on rx
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dl_rlc_buffer_state(ue_ev.rnti, lcid, tot_dl_data, 0); // TODO: Check retx_queue
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}
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}
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if (ue_ev.buffer_ev->sr_data > 0 and user->drb_cfg_flag) {
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uint32_t tot_ul_data =
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ue_db[ue_ev.rnti].get_pending_ul_new_data(tti_info.tti_params.tti_tx_ul) + ue_ev.buffer_ev->sr_data;
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uint32_t lcid = 2;
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ul_bsr(ue_ev.rnti, lcid, tot_ul_data, true);
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}
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}
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}
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return SRSLTE_SUCCESS;
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}
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int sched_ca_tester::process_ack_txs()
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{
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/* check if user was removed. If so, clean respective acks */
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erase_if(to_ack,
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[this](std::pair<const uint32_t, ack_info_t>& elem) { return this->ue_db.count(elem.second.rnti) == 0; });
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erase_if(to_ul_ack,
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[this](std::pair<const uint32_t, ul_ack_info_t>& elem) { return this->ue_db.count(elem.second.rnti) == 0; });
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/* Ack DL HARQs */
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for (const auto& ack_it : to_ack) {
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if (ack_it.second.tti != tti_info.tti_params.tti_rx) {
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continue;
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}
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const ack_info_t& dl_ack = ack_it.second;
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srsenb::dl_harq_proc* h = ue_db[dl_ack.rnti].get_dl_harq(ack_it.second.dl_harq.get_id(), dl_ack.ue_cc_idx);
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const srsenb::dl_harq_proc& hack = dl_ack.dl_harq;
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CONDERROR(hack.is_empty(), "[TESTER] The acked DL harq was not active\n");
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bool ret = false;
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for (uint32_t tb = 0; tb < SRSLTE_MAX_TB; ++tb) {
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if (dl_ack.dl_harq.is_empty(tb)) {
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continue;
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}
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ret |= dl_ack_info(tti_info.tti_params.tti_rx, dl_ack.rnti, dl_ack.ue_cc_idx, tb, dl_ack.ack) > 0;
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}
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CONDERROR(not ret, "[TESTER] The dl harq proc that was ACKed does not exist\n");
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if (dl_ack.ack) {
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CONDERROR(!h->is_empty(), "[TESTER] ACKed dl harq was not emptied\n");
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CONDERROR(h->has_pending_retx(0, tti_info.tti_params.tti_tx_dl),
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"[TESTER] ACKed dl harq still has pending retx\n");
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log_global->info("[TESTER] DL ACK tti=%u rnti=0x%x pid=%d\n",
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tti_info.tti_params.tti_rx,
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dl_ack.rnti,
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dl_ack.dl_harq.get_id());
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} else {
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CONDERROR(h->is_empty() and hack.nof_retx(0) + 1 < hack.max_nof_retx(), "[TESTER] NACKed DL harq got emptied\n");
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}
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}
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/* Ack UL HARQs */
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for (const auto& ack_it : to_ul_ack) {
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if (ack_it.first != tti_info.tti_params.tti_rx) {
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continue;
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}
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const ul_ack_info_t& ul_ack = ack_it.second;
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srsenb::ul_harq_proc* h = ue_db[ul_ack.rnti].get_ul_harq(tti_info.tti_params.tti_rx, ul_ack.ue_cc_idx);
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const srsenb::ul_harq_proc& hack = ul_ack.ul_harq;
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CONDERROR(h == nullptr or h->get_tti() != hack.get_tti(), "[TESTER] UL Harq TTI does not match the ACK TTI\n");
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CONDERROR(h->is_empty(0), "[TESTER] The acked UL harq is not active\n");
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CONDERROR(hack.is_empty(0), "[TESTER] The acked UL harq was not active\n");
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ul_crc_info(tti_info.tti_params.tti_rx, ul_ack.rnti, ul_ack.ue_cc_idx, ul_ack.ack);
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CONDERROR(!h->get_pending_data(), "[TESTER] UL harq lost its pending data\n");
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CONDERROR(!h->has_pending_ack(), "[TESTER] ACK/NACKed UL harq should have a pending ACK\n");
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if (ul_ack.ack) {
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CONDERROR(!h->is_empty(), "[TESTER] ACKed UL harq did not get emptied\n");
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CONDERROR(h->has_pending_retx(), "[TESTER] ACKed UL harq still has pending retx\n");
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log_global->info(
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"[TESTER] UL ACK tti=%u rnti=0x%x pid=%d\n", tti_info.tti_params.tti_rx, ul_ack.rnti, hack.get_id());
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} else {
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// NACK
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CONDERROR(!h->is_empty() and !h->has_pending_retx(), "[TESTER] If NACKed, UL harq has to have pending retx\n");
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CONDERROR(h->is_empty() and hack.nof_retx(0) + 1 < hack.max_nof_retx(),
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"[TESTER] Nacked UL harq did get emptied\n");
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}
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}
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// erase processed acks
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to_ack.erase(tti_info.tti_params.tti_rx);
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to_ul_ack.erase(tti_info.tti_params.tti_rx);
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// bool ack = true; //(tti_data.tti_rx % 3) == 0;
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// if (tti_data.tti_rx >= FDD_HARQ_DELAY_MS) {
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// for (auto it = ue_db.begin(); it != ue_db.end(); ++it) {
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// uint16_t rnti = it->first;
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// srsenb::ul_harq_proc* h = ue_db[rnti].get_ul_harq(tti_data.tti_rx);
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// if (h != nullptr and not h->is_empty()) {
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// ul_crc_info(tti_data.tti_rx, rnti, ack);
|
|
|
|
// }
|
|
|
|
// }
|
|
|
|
// }
|
|
|
|
return SRSLTE_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
void sched_ca_tester::run_tti(uint32_t tti_rx, const tti_ev& tti_events)
|
|
|
|
{
|
|
|
|
new_test_tti(tti_rx);
|
|
|
|
log_global->info("[TESTER] ---- tti=%u | nof_ues=%zd ----\n", tti_rx, ue_db.size());
|
|
|
|
|
|
|
|
process_tti_events(tti_events);
|
|
|
|
process_ack_txs();
|
|
|
|
// before_sched();
|
|
|
|
|
|
|
|
// Call scheduler for all carriers
|
|
|
|
tti_info.dl_sched_result.resize(sched_cell_params.size());
|
|
|
|
for (uint32_t i = 0; i < sched_cell_params.size(); ++i) {
|
|
|
|
dl_sched(tti_info.tti_params.tti_tx_dl, i, tti_info.dl_sched_result[i]);
|
|
|
|
}
|
|
|
|
tti_info.ul_sched_result.resize(sched_cell_params.size());
|
|
|
|
for (uint32_t i = 0; i < sched_cell_params.size(); ++i) {
|
|
|
|
ul_sched(tti_info.tti_params.tti_tx_ul, i, tti_info.ul_sched_result[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
process_results();
|
|
|
|
set_acks();
|
|
|
|
|
|
|
|
tti_counter++;
|
|
|
|
}
|
|
|
|
|
|
|
|
int sched_ca_tester::process_results()
|
|
|
|
{
|
|
|
|
for (uint32_t i = 0; i < sched_cell_params.size(); ++i) {
|
|
|
|
TESTASSERT(ue_tester->test_all(i, tti_info.dl_sched_result[i], tti_info.ul_sched_result[i]) == SRSLTE_SUCCESS);
|
|
|
|
TESTASSERT(output_tester[i].test_all(
|
|
|
|
tti_info.tti_params, tti_info.dl_sched_result[i], tti_info.ul_sched_result[i]) == SRSLTE_SUCCESS);
|
|
|
|
}
|
|
|
|
sched_stats->process_results(tti_info.tti_params, tti_info.dl_sched_result, tti_info.ul_sched_result);
|
|
|
|
|
|
|
|
return SRSLTE_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
int sched_ca_tester::set_acks()
|
|
|
|
{
|
|
|
|
for (uint32_t ccidx = 0; ccidx < sched_cell_params.size(); ++ccidx) {
|
|
|
|
// schedule future acks
|
|
|
|
for (uint32_t i = 0; i < tti_info.dl_sched_result[ccidx].nof_data_elems; ++i) {
|
|
|
|
ack_info_t ack_data;
|
|
|
|
ack_data.rnti = tti_info.dl_sched_result[ccidx].data[i].dci.rnti;
|
|
|
|
ack_data.tti = FDD_HARQ_DELAY_MS + tti_info.tti_params.tti_tx_dl;
|
|
|
|
ack_data.ue_cc_idx = ue_db[ack_data.rnti].get_cell_index(ccidx).second;
|
|
|
|
const srsenb::dl_harq_proc* dl_h =
|
|
|
|
ue_db[ack_data.rnti].get_dl_harq(tti_info.dl_sched_result[ccidx].data[i].dci.pid, ccidx);
|
|
|
|
ack_data.dl_harq = *dl_h;
|
|
|
|
if (ack_data.dl_harq.nof_retx(0) == 0) {
|
|
|
|
ack_data.ack = randf() > sim_args.P_retx;
|
|
|
|
} else { // always ack after three retxs
|
|
|
|
ack_data.ack = ack_data.dl_harq.nof_retx(0) == 3;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Remove harq from the ack list if there was a harq rewrite
|
|
|
|
auto it = to_ack.begin();
|
|
|
|
while (it != to_ack.end() and it->first < ack_data.tti) {
|
|
|
|
if (it->second.rnti == ack_data.rnti and it->second.dl_harq.get_id() == ack_data.dl_harq.get_id() and
|
|
|
|
it->second.ue_cc_idx == ack_data.ue_cc_idx) {
|
|
|
|
CONDERROR(it->second.tti + 2 * FDD_HARQ_DELAY_MS > ack_data.tti,
|
|
|
|
"[TESTER] The retx dl harq id=%d was transmitted too soon\n",
|
|
|
|
ack_data.dl_harq.get_id());
|
|
|
|
auto toerase_it = it++;
|
|
|
|
to_ack.erase(toerase_it);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
++it;
|
|
|
|
}
|
|
|
|
// add new ack to the list
|
|
|
|
to_ack.insert(std::make_pair(ack_data.tti, ack_data));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Schedule UL ACKs */
|
|
|
|
for (uint32_t i = 0; i < tti_info.ul_sched_result[ccidx].nof_dci_elems; ++i) {
|
|
|
|
const auto& pusch = tti_info.ul_sched_result[ccidx].pusch[i];
|
|
|
|
ul_ack_info_t ack_data;
|
|
|
|
ack_data.rnti = pusch.dci.rnti;
|
|
|
|
ack_data.ul_harq = *ue_db[ack_data.rnti].get_ul_harq(tti_info.tti_params.tti_tx_ul, ccidx);
|
|
|
|
ack_data.tti_tx_ul = tti_info.tti_params.tti_tx_ul;
|
|
|
|
ack_data.tti_ack = tti_info.tti_params.tti_tx_ul + FDD_HARQ_DELAY_MS;
|
|
|
|
ack_data.ue_cc_idx = ue_db[ack_data.rnti].get_cell_index(ccidx).second;
|
|
|
|
if (ack_data.ul_harq.nof_retx(0) == 0) {
|
|
|
|
ack_data.ack = randf() > sim_args.P_retx;
|
|
|
|
} else {
|
|
|
|
ack_data.ack = ack_data.ul_harq.nof_retx(0) == 3;
|
|
|
|
}
|
|
|
|
to_ul_ack.insert(std::make_pair(ack_data.tti_tx_ul, ack_data));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return SRSLTE_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
/******************************
|
|
|
|
* Scheduler Tests
|
|
|
|
*****************************/
|
|
|
|
|
|
|
|
sim_sched_args generate_default_sim_args(uint32_t nof_prb, uint32_t nof_ccs)
|
|
|
|
{
|
|
|
|
sim_sched_args sim_args;
|
|
|
|
|
|
|
|
sim_args.nof_ttis = 10240 + 10;
|
|
|
|
sim_args.P_retx = 0.1;
|
|
|
|
|
|
|
|
sim_args.ue_cfg = generate_default_ue_cfg();
|
|
|
|
|
|
|
|
// setup two cells
|
|
|
|
std::vector<srsenb::sched_interface::cell_cfg_t> cell_cfg(nof_ccs, generate_default_cell_cfg(nof_prb));
|
|
|
|
cell_cfg[0].scell_list.resize(1);
|
|
|
|
cell_cfg[0].scell_list[0].enb_cc_idx = 1;
|
|
|
|
cell_cfg[0].scell_list[0].cross_carrier_scheduling = false;
|
|
|
|
cell_cfg[0].scell_list[0].ul_allowed = true;
|
|
|
|
cell_cfg[1].cell.id = 2; // id=2
|
|
|
|
cell_cfg[1].scell_list = cell_cfg[0].scell_list;
|
|
|
|
cell_cfg[1].scell_list[0].enb_cc_idx = 0;
|
|
|
|
sim_args.cell_cfg = std::move(cell_cfg);
|
|
|
|
|
|
|
|
sim_args.bearer_cfg = {};
|
|
|
|
sim_args.bearer_cfg.direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
|
|
|
|
|
|
|
|
/* Setup Derived Params */
|
|
|
|
sim_args.ue_cfg.supported_cc_list.resize(nof_ccs);
|
|
|
|
for (uint32_t i = 0; i < sim_args.ue_cfg.supported_cc_list.size(); ++i) {
|
|
|
|
sim_args.ue_cfg.supported_cc_list[i].active = true;
|
|
|
|
sim_args.ue_cfg.supported_cc_list[i].enb_cc_idx = i;
|
|
|
|
}
|
|
|
|
|
|
|
|
return sim_args;
|
|
|
|
}
|
|
|
|
|
|
|
|
int run_sim1()
|
|
|
|
{
|
|
|
|
/* Simulation Configuration Arguments */
|
|
|
|
uint32_t nof_prb = 25;
|
|
|
|
uint32_t nof_ccs = 2;
|
|
|
|
|
|
|
|
/* Simulation Objects Setup */
|
|
|
|
sched_sim_event_generator generator;
|
|
|
|
// Setup scheduler
|
|
|
|
sched_ca_tester tester;
|
|
|
|
tester.sim_args = generate_default_sim_args(nof_prb, nof_ccs);
|
|
|
|
tester.init(nullptr);
|
|
|
|
TESTASSERT(tester.cell_cfg(tester.sim_args.cell_cfg) == SRSLTE_SUCCESS);
|
|
|
|
|
|
|
|
/* Internal configurations. Do not touch */
|
|
|
|
float ul_sr_exps[] = {1, 4}; // log rand
|
|
|
|
float dl_data_exps[] = {1, 4}; // log rand
|
|
|
|
float P_ul_sr = randf() * 0.5, P_dl = randf() * 0.5;
|
|
|
|
uint32_t tti_start = 0; // rand_int(0, 10240);
|
|
|
|
const uint16_t rnti1 = 70;
|
|
|
|
uint32_t pcell_idx = 0;
|
|
|
|
|
|
|
|
/* Setup Simulation */
|
|
|
|
uint32_t prach_tti = 1, msg4_tot_delay = 10; // TODO: check correct value
|
|
|
|
uint32_t msg4_size = 20; // TODO: Check
|
|
|
|
uint32_t duration = 1000;
|
|
|
|
auto process_ttis = [&generator, &tti_start, &tester]() {
|
|
|
|
for (; tester.tti_counter <= generator.tti_counter;) {
|
|
|
|
uint32_t tti = (tti_start + tester.tti_counter) % 10240;
|
|
|
|
log_global->step(tti);
|
|
|
|
tester.run_tti(tti, generator.tti_events[tester.tti_counter]);
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Simulation */
|
|
|
|
|
|
|
|
// Event PRACH: PRACH takes place for "rnti1", and carrier "pcell_idx"
|
|
|
|
generator.step_until(prach_tti);
|
|
|
|
tti_ev::user_cfg_ev* user = generator.add_new_default_user(duration);
|
|
|
|
user->ue_cfg->supported_cc_list[0].enb_cc_idx = pcell_idx;
|
|
|
|
user->rnti = rnti1;
|
|
|
|
process_ttis();
|
|
|
|
TESTASSERT(tester.ue_tester->user_exists(rnti1));
|
|
|
|
|
|
|
|
// Event (TTI=prach_tti+msg4_tot_delay): First Tx (Msg4). Goes in SRB0 and contains ConRes
|
|
|
|
generator.step_tti(msg4_tot_delay);
|
|
|
|
generator.add_dl_data(rnti1, msg4_size);
|
|
|
|
process_ttis();
|
|
|
|
|
|
|
|
// Event (20 TTIs): Data back and forth
|
|
|
|
auto generate_data = [&](uint32_t nof_ttis, float prob_dl, float prob_ul) {
|
|
|
|
for (uint32_t i = 0; i < nof_ttis; ++i) {
|
|
|
|
generator.step_tti();
|
|
|
|
bool ul_flag = randf() < prob_ul, dl_flag = randf() < prob_dl;
|
|
|
|
if (dl_flag) {
|
|
|
|
float exp = dl_data_exps[0] + randf() * (dl_data_exps[1] - dl_data_exps[0]);
|
|
|
|
generator.add_dl_data(rnti1, pow(10, exp));
|
|
|
|
}
|
|
|
|
if (ul_flag) {
|
|
|
|
float exp = ul_sr_exps[0] + randf() * (ul_sr_exps[1] - ul_sr_exps[0]);
|
|
|
|
generator.add_ul_data(rnti1, pow(10, exp));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
generate_data(20, P_dl, P_ul_sr);
|
|
|
|
process_ttis();
|
|
|
|
|
|
|
|
// Event: Reconf Complete. Activate SCells. Check if CE correctly transmitted
|
|
|
|
generator.step_tti();
|
|
|
|
user = generator.user_reconf(rnti1);
|
|
|
|
*user->ue_cfg = *tester.get_ue_cfg(rnti1); // use current cfg as starting point, and add more supported ccs
|
|
|
|
user->ue_cfg->supported_cc_list.resize(nof_ccs);
|
|
|
|
for (uint32_t i = 0; i < user->ue_cfg->supported_cc_list.size(); ++i) {
|
|
|
|
user->ue_cfg->supported_cc_list[i].active = true;
|
|
|
|
user->ue_cfg->supported_cc_list[i].enb_cc_idx = i;
|
|
|
|
}
|
|
|
|
process_ttis();
|
|
|
|
// When a new DL tx takes place, it should also encode the CE
|
|
|
|
for (uint32_t i = 0; i < 100; ++i) {
|
|
|
|
TESTASSERT(tester.tti_info.dl_sched_result[pcell_idx].nof_data_elems > 0);
|
|
|
|
if (tester.tti_info.dl_sched_result[pcell_idx].data[0].nof_pdu_elems[0] > 0) {
|
|
|
|
// it is a new DL tx
|
|
|
|
TESTASSERT(tester.tti_info.dl_sched_result[pcell_idx].data[0].pdu[0][0].lcid ==
|
|
|
|
srslte::sch_subh::cetype::SCELL_ACTIVATION);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
generator.step_tti();
|
|
|
|
process_ttis();
|
|
|
|
// now we have two CCs
|
|
|
|
}
|
|
|
|
// now we have two CCs
|
|
|
|
|
|
|
|
// Event: Generate a bit more data, now it should go through both cells
|
|
|
|
generate_data(10, 1.0, 1.0);
|
|
|
|
process_ttis();
|
|
|
|
TESTASSERT(tester.sched_stats->users[rnti1].tot_dl_sched_data[0] > 0);
|
|
|
|
TESTASSERT(tester.sched_stats->users[rnti1].tot_dl_sched_data[1] > 0);
|
|
|
|
TESTASSERT(tester.sched_stats->users[rnti1].tot_ul_sched_data[0] > 0);
|
|
|
|
TESTASSERT(tester.sched_stats->users[rnti1].tot_ul_sched_data[1] > 0);
|
|
|
|
|
|
|
|
log_global->info("[TESTER] Sim1 finished successfully\n");
|
|
|
|
return SRSLTE_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
int main()
|
|
|
|
{
|
|
|
|
srslte::logmap::get_instance()->set_default_log_level(srslte::LOG_LEVEL_INFO);
|
|
|
|
printf("[TESTER] This is the chosen seed: %u\n", seed);
|
|
|
|
uint32_t N_runs = 1;
|
|
|
|
for (uint32_t n = 0; n < N_runs; ++n) {
|
|
|
|
printf("Sim run number: %u\n", n + 1);
|
|
|
|
TESTASSERT(run_sim1() == SRSLTE_SUCCESS);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|